Terahertz (THz) spectrum (0.3 THz – 3 THz) has essential applications in high-speed communications for future 6G, non-invasive imaging, and spectroscopy. Among the diverse technologies, the commercial and high-yield silicon-based integrated circuit technology is more attractive for compact and low-cost terahertz applications. However, the low speed of the transistor limits the output power at terahertz frequency. Fortunately, the scalable coupled oscillator-radiator array architecture makes high-power terahertz radiation possible. The array comprises synchronized oscillators with proper modes at the fundamental frequency. The desired harmonic signals will radiate into space and combine coherently for high output power and directive beam by relying on the embedded antenna within each oscillator unit cell. This thesis proposes several topologies for the terahertz signal generation and radiation beyond 400 GHz in the TSMC 65-nm CMOS process, improving efficiency, output power, and effective isotropic radiated power (EIRP). The first design operates at ~450 GHz, demonstrating the highest EIRP of 28.2 dBm and the highest dc-to-terahertz efficiency of 0.16% among all THz scalable radiators beyond 400 GHz. These are achieved by synthesizing the oscillator with strong fundamental oscillation, maximizing second-harmonic generation, optimizing back-side radiation efficiency of the on-chip slot antenna array, and introducing a low-cost Teflon lens. The second design presents a new scalable topology using an on-chip patch antenna for easy package and heat dissipation. In the third design, we improve the circuit design method and propose a miniature on-chip patch antenna and a ring scalable coupling topology, resulting in a compact size and the highest radiated power per area of 0.66mW/mm² among the radiators using patch antennas. The three designs radiate the second harmonic between 400 GHz and 500 GHz with a fundamental frequency above 200 GHz. Further increasing the fundamental frequency for higher output frequency may seriously degrade the efficiency because the oscillation frequency is quite close to f_max of the transistor. Therefore, we choose to extract the third harmonic for the fourth design and propose a novel compact 2-D scalable topology operating at ~700 GHz. This design achieves the output power of -3 dBm, EIRP of 27.3 dBm, dc-to-THz efficiency of 0.066%, and tuning range of 5.26%, all of which are the highest among the coherent, scalable radiators beyond 600 GHz.