III-V Semiconductor Nanowires for High Performance Electronic and Photodetection Applications

III-V族半導體納米線在高性能電子器件和光電探測領域的應用

Student thesis: Doctoral Thesis

View graph of relations

Author(s)

Related Research Unit(s)

Detail(s)

Awarding Institution
Supervisors/Advisors
Award date14 Sep 2017

Abstract

In recent decades, III–V compound semiconductor nanowires (NWs) have attracted considerable research interests in diverse applications of high-performance nanoelectronics and nanophotonics, due to their high carrier mobility, tunable direct bandgap, excellent mechanical flexibility, high sensitivity to light and extraordinarily large surface-to-volume ratio. Among many III−V NW materials, indium arsenide (InAs) NWs have direct narrow bandgap, superior electron mobility, and highly efficient visible/near-infrared photoresponse at room temperature. They have been demonstrated to exhibit great potential in electronic and optoelectronic applications, such as broad-spectrum photodetectors that range from ultraviolet to infrared regions. However, because of the presence of a large amount of surface states that originate from the unstable native oxide, significant surface trap charges are accumulated on the InAs NW, forming an electron surface accumulation layer, which results in Fermi level pinning above the conduction band; therefore, it is critical to manipulate the surface states to meet the applications of InAs NWs. Besides, owing to its relatively small electronic bandgap, further applications are restricted by the substantial leakage current. Ternary indium gallium arsenide (InGaAs) NWs with uniformly tunable chemical stoichiometries have been successfully used as promising device channel materials, and their relatively larger bandgap can reduce the leakage issue but not the electron mobility.
At the same time, wrap-gated or gate-all-around nanowire field-effect-transistors (NWFETs) have also been explored as an ideal electronic device geometry for low-power and high-frequency applications. Nevertheless, further performance enhancement and practical implementation still suffer from electron scattering on nanowire surface/interface traps between the nanowire channel and gate dielectric as well as the complicated device fabrication scheme. In this dissertation, single-crystalline InGaAs NWs with tunable chemical stoichiometry, smooth surface and low defect concentration have been successfully synthesized using a unique two-step catalytic chemical vapor deposition (CVD) method. High-performance wrap-gated InGaAs NWFETs are fabricated by adopting a hybrid approach. This method combines the well-established sputter deposition to achieve high-quality Al2O3 dielectric layers and pre-deposition surface passivation of NW channels by a self-assembly sulfur-containing monolayer. The high-κ gate dielectric Al2O3 layer is deposited homogeneously around the NW channel by conventional sputtering, which is a more economically and industrially friendly process compared to the typical atomic layer deposition (ALD) scheme in obtaining the dielectrics. The pre-sputtering chemical passivation by ammonium sulfide ((NH4)2S) is also employed to alleviate the detrimental effect of the plasma induced surface/interface defect trap states on the NW channels. Utilizing this passivation, the wrap-gated device exhibits superior electrical performances, with a high ION/IOFF ratio of ∼2 × 106, a low subthreshold slope (SS) of 80 mV/decade, a small IOFF of 0.4 pA, and a peak field-effect mobility of ∼1600 cm2/(Vs) at VDS = 0.1 V at room temperature. These values are better than those of state-of-the-art ALD enabled WG NWFETs reported so far. By combining sputtering and pre-deposition chemical passivation to achieve high-quality gate dielectrics for wrap-gated NWFETs, the superior gate coupling and electrical performances have been achieved, confirming the effectiveness of the hybrid approach for future advanced electronic devices.
Simultaneously, negative photoconductivity (NPC) mechanisms have been widely investigated and usually attributed to the severe carrier scattering centers, light-assisted hot electron trapping in the surface oxide or defects induced photogating layer (PGL). However, further insights into their photodetecting mechanisms as well as the corresponding performance enhancement of these InAs NW phototransistors are still very limited. In this thesis, uniform InAs NWs with good crystallinity have been synthesized utilizing a solid source chemical vapor deposition (SSCVD) method. The NPC behavior in the surface-passivated InAs NW phototransistors are demonstrated based on the photoexcitation induced majority electron trapping in the bonded sulfur monolayer under optical illumination. In order to enhance the hot electron trapping ability of the bonded sulfur layer, aromatic thiolate (ArS)-based molecular monolayer with strong electron-withdrawing group is then employed for the surface modification of InAs NW phototransistor by simple wet chemistry. This stronger electron-withdrawing ability of the ArS-based molecular monolayer can not only increase the magnitude of photoexcitation induced hot electron trapping, but also enable the hot electrons to be trapped and released more efficiently, resulting in a good sensitivity, fast photoresponse and long-term stability of the NW phototransistors to visible light with low power intensity. All these findings reveal the potential of these InAs NW phototransistors surface-decorated with molecular monolayers for the realization of high-sensitivity and long-term stability nanoscale photodetectors operated at room temperature.