To further aggressively downscale the metal-oxide-semiconductor (MOS) devices, silicon oxynitride will be one of the most promising and technologically feasible dielectric materials to replace conventional silicon dioxide in the near-term technology nodes. It was found recently that the silicon oxynitride prepared by oxidation of silicon-rich silicon nitride (SRN) has several important merits: its high nitrogen and extremely low hydrogen content allows it to have a high dielectric constant and a low trap density; besides, its random-bonding structure yields low fluctuations for both dielectric permittivity and surface potential. This research investigates the electrical reliability of the silicon-rich silicon nitride prepared by low-pressure chemical vapor deposition (LPCVD) and the silicon oxynitride prepared by thermal oxidation of LPCVD silicon-rich silicon nitride. The electrical reliability of this kind of gate dielectric film is investigated by studying the charge trapping and interface state generation induced by constant current stressing. It is found that for the SRN films oxidized at 850 °C and 950 °C, the interface trap generation is minimal because of the high nitrogen content at the interface; besides, the silicon atoms at the interface exist in the form of random bonding to oxygen and nitrogen atoms, which consequently reduces the interface bonding constraint and results in low interface trap density. At a higher oxidation temperature of 1050 °C, a large flatband shift is found after the stressing because of the significant reduction of nitrogen content and the effect of phase separation at this temperature; besides, the trace amount of interface nitrogen atoms exist in the form of a highly constrained phase and the interface oxynitride layer is a random mixture of highly constrained phases, which consequently reduces the reliability against high-energy electron stressing. The electrical reliability against high-energy electron stressing is also reflected in the time-dependent dielectric breakdown characteristics under constant voltage stressing. It is found that the trend of dielectric breakdown agrees with the trend of flatband voltage shifts. The time-to-breakdown for the silicon-rich samples are rather short because the defect density responsible for the breakdown conducting pathways is predominantly contributed by the large amount of traps introduced by the excess silicon atoms; the as-deposited sample has a longer time-to-breakdown than the 850 °C-oxidized sample since the large leakage current in the former will reduce the charge build-up rate. The 950 °C-oxidized sample has the longest time-to-breakdown, it is the most robust against high-field stressing because of its less amount of insulator traps and better interface hardness due to its highest amount of random-bonding oxynitride tetrahedra in addition to the high nitrogen content at the interface. The sample heavily oxidized at 1050 °C has the shortest time-to-breakdown, as it is essentially a silicon dioxide material which makes it more susceptible to impact ionization under high-field stressing. The results suggest a promising process for high-quality oxynitride film preparation for metal-insulator-semiconductor (MIS) gate dielectrics due to the low trap density and high nitrogen content.