Switched-capacitor DC-DC converters, or charge pump circuits are electronic building blocks which convert one DC voltage level to another DC voltage level by using capacitor switch networks. Without using any inductive elements, they can be readily implemented in the mainstream CMOS technology in rather compact sizes. Charge pump circuits are now widely used for high voltage generation in flash memory devices, in TFT-LCD divers, in RFID systems and in biomedical systems. This work presents a rather comprehensive study on various aspects of the charge pump circuits design and analysis. By first performing detailed investigations, and complete comparisons of various schemes, it was possible to further reach some optimization methods for these types of converters. During this research, the study was focused on the development of a large-signal dynamical analysis method for evaluating the start-up times of various charge pump topologies. In this method, the output voltage and the accumulated charge of a charge pump circuit, after any clock cycle, can be found by solving some basic matrix equations with specific loading currents and initial conditions. Comparing to the circuit-level simulation and the state-space analysis methods, the one proposed in this work is simpler and of a higher efficiency. The maximum percentage error between the calculation and the simulation results obtained by using some ideal components in the SPICE simulation is less than 0.2% in most of the cases, which suggests that the theoretical results derived are very accurate in general. The start-up times of various charge pump topologies were further compared and discussed based on the analyzed results. It was found that the start-up times for the Fibonacci and the exponential charge pumps can only be about 16% of that of the linear one, when the conversion ratio and the coupling to output capacitance ratio are large. Power and area efficiencies are two important concerns in the charge pump designs. In the present study, the design of Dickson, which is one of the most popular charge pump circuits, is discussed in detail. The performance analysis of the Dickson charge pump is performed based on a more precise equivalent circuit by taking the parasitic capacitances and the switch "on"-resistances of the transistors into consideration. Based on this model, the optimal number of stages of the charge pump, considering both the power efficiency and silicon area performance of the charge pump under pre-specified output voltage and loading current, can be obtained. Considering the performance of such circuits depends on the implementation method, two practical, high-efficient CMOS charge pump circuits are proposed in this work. One of them is the linear charge pump in which the overdrive voltages of the transistors remain unchanged regardless the loading currents. It provides a wider loading current range of operation when compared to the conventional configurations. The other proposed scheme is the 4× exponential charge pump in which the reverse currents are suppressed effectively by using dynamic inverters. This second configuration is more efficient and easier to be implemented, when compared to the conventional schemes. The new exponential charge pump was fabricated. The chip area is 377x62μm2 with the use of some off-chip capacitors. From the measurement results, it was found that the power efficiency can be above 80% in general, with a maximum value up to 95%. Voltage regulation is an indispensable component of a charge pump circuit. When the output voltage is regulated at a fixed value, the power efficiency can drop greatly if the supply voltage is increased, while its conversion ratio is kept constant. Using the gain hopping technique, a reconfigurable 2/3× or 1/2× charge pump is designed in the present work for operating over a wide input voltage range. The equivalent conversion ratio of the charge pump can be adaptively adjusted according to different input voltages and loading currents. Comparing to some conventional charge pumps, which are nonreconfigurable or have the conversion ratio fixed at a few discrete values according to some input voltages only, the overall power efficiency of the regulated charge pump can be improved over a wide input voltage and loading current ranges, with a maximum of 20% more in the simulated power eficiency was found. The simulation line regulation, load regulation and the settling time (with a loading current transition of 50mA) were found to be 0.1V/V, 0.414V/A and about 60μs, respectively.