SRAM-based ternary content addressable memory

Abstract

Ternary content-addressable memory (TCAM) performs high-speed search in constant time which makes TCAM an ideal candidate for applications that need high-speed search such as packet forwarding and classification in network routers. TCAM allows its memory to be searched by contents rather than by an address and a memory location among matches is selected. Unlike TCAM, static random-access memory (SRAM) receives address and retrieves data at that address. Although, TCAM provides high-speed search but when compared with SRAM, TCAM has certain limitations such as low storage density, relatively slow access time, low scalability, complex circuitry, and is very expensive. Thus, the throughput of classical TCAM is limited by the relatively low speed of TCAM. Furthermore, traditional TCAMs cannot be implemented on field-programmable gate array (FPGA) and we know that FPGA is used in many applications such as networking systems owing to several reasons that include its reconfigure-ability, massive hardware parallelism, rapid prototyping, and more importantly the provision of high clock rate. Thus, owing to the potential advantages of SRAM over CAM and feasibility of FPGA technology, can we utilize SRAM by configuring it (with additional logic) to enable it to behave like TCAM and to exploit FPGA technology as an implementation platform? We propose several SRAM-based architectures for TCAM. We have successfully implemented our proposed TCAMs on Xilinx Virtex-5, Virtex-6, and Virtex-7 FPGAs. We have also designed one of the proposed TCAMs, Z-TCAM, using OSUcells library for 0:18μm technology, which confirms the physical and technical feasibility of our work. One of our proposed TCAMs, UE-TCAM, achieves 100% reduction in block- RAMs (18K), more than 70% in slice registers and lookup tables, more than 50% in energy/bit/search, more than 60% in energy-delay product, compared with the best available SRAM-based TCAM designs. We have thoroughly provided implementation results for each proposed design in the thesis.

Date of Award	3 Oct 2014
Original language	English
Awarding Institution	City University of Hong Kong
Supervisor	Chak Chung Ray CHEUNG (Supervisor) & Yan Cheong CHAN (Supervisor)