Optimizing phase change memory for application specific systems

Abstract

Nowadays, application specific systems have been widely applied in industrial, medical and military areas, with the design requirements of high performance and low power. Dynamic random-access memory (DRAM) is widely applied as main memory in application specific systems. Along with the continuous shrinking of the processor technology, DRAM is facing both scaling and power problems. The limited scalability and large leakage power restrict its adoption in future high-performance and low-power systems. As a result, phase change memory (PCM) is proposed as an alternative to serve as main memory. The advantages of PCM include high storage density, near-zero leakage power and non-volatility. However, PCM has the challenges of high write cost and limited endurance. In this thesis, optimizations regarding these two aspects are addressed. Specifically, this thesis consists of three topics: 1) a bit-level wear leveling strategy to improve PCM endurance; 2) a mode transformation scheme to improve the endurance for high-density PCM; 3) a state remapping scheme targeting write cost reduction. The first two topics are designed for endurance optimization and the third scheme is proposed to reduce the write energy. In the first topic, an intra-line flipping scheme is proposed to balance write operations across various bits within memory lines. Two issues pertaining to flipping granularity and flipping frequency are discussed. This scheme can be combined with existing coarser-grained wear leveling strategies to achieve a more balanced write distribution so that the memory endurance can be improved. In the second topic, in order to improve the lifetime of high-density phase change memory, a mode transformation approach is proposed to dynamically transform high-density pages to low-density mode. This technique exploits the tenacity advantage of low-density PCM. Both the workload variation and process variation are taken into consideration for mode transformation. In the third topic, motivated by the fact that different states in PCM cells have asymmetric programming costs, frequently written states are proposed to be remapped to cost-efficient ones so that the total write energy can be reduced. Dynamic and static state remapping schemes are analyzed and compared, and an optimal static state remapping algorithm is developed to reduce the total write energy with negligible runtime overhead. On the basis of these optimizations, PCM can further qualify to be adopted as main memory in future high-performance and low-power embedded systems. ii

Date of Award	15 Jul 2015
Original language	English
Awarding Institution	City University of Hong Kong
Supervisor	Chun Jason XUE (Supervisor)