Optimization for Energy Harvesting Powered Non-volatile Processors

Abstract

In recent years, some researchers focus on introducing energy harvesting powered systems to support running electronic devices without charging. Energy harvesting powered systems harvest energy from nature, such as wind, solar, and footfalls, to make the systems self-powered. Nevertheless, the harvested power is unstable and unsustainable so that the power failures frequently happen for the energy harvesting powered systems. Non-volatile processors have been proposed to ensure the sustainability of program running in energy harvesting powered systems. Due to the unstable power source, the energy harvesting powered processors may need to be checkpointed frequently. There are two challenges when checkpointing is implemented. One is that the overhead of checkpointing is heavy. The other is that there may be inconsistency errors which are induced by non-volatile memory.

This thesis concentrates on optimizing checkpointing for energy harvesting powered non-volatile processors. It is comprised of three parts:
1) a checkpointing-aware loop tiling method to reduce the size of checkpointing data; 2) a consistency-aware retiming approach to reduce the number of checkpoints without the inconsistency errors; 3) a checkpointing-aware data allocation method to reduce the total energy consumption without the inconsistency errors.

In the first part, a checkpointing-aware loop tiling technique which targets to reduce the checkpointing and recovering overheads for loops is proposed. It is observed that checkpointing is implemented with high overheads in applications with loops. Based on the observation, reducing the amount of checkpointing data by analyzing data locality and shortening data lifetime in loops is presented. First, the optimal tile size is derived for nested loops considering checkpointing distance and data dependencies. Then, the implementations of checkpointing and recovering for tiled loops are presented.

In the second part, a consistency-aware loop retiming method is proposed to significantly reduce the number of checkpoints within loops without the inconsistency errors. Non-volatile memory, which is utilized to maintain data persistence for non-volatile processors, may also bring inconsistency errors. Previous work by inserting checkpoints between load-store pairs to eliminate the inconsistency errors brings heavy checkpointing overheads. However, it is also observed that the inconsistency errors may exist within loops. The proposed method maximizes the dependency distance of the inconsistency-error nodes within loops and also maximizes the checkpoint distance for these nodes. Thus the number of heavy checkpoints for eliminating the inconsistency errors are reduced.

In the third part, a checkpointing-aware data allocation method is proposed to reduce the total dynamic energy consumption of checkpointing and program execution without inconsistency errors. It is observed that different allocation schemes for different categories of array data within loops may induce different checkpointing implementations. Based on the observation, the proposed method compares the two allocations before allocating an array to volatile memory or non-volatile memory and selects a more beneficial allocation for the array. Thus a data allocation for the whole array data with less energy consumption of checkpointing and program execution is achieved.

Upon these optimization techniques, energy harvesting powered non-volatile processors can improve checkpointing efficiency, and reduce the total dynamic energy consumption of checkpointing and program execution.

Date of Award	20 Jun 2019
Original language	English
Awarding Institution	City University of Hong Kong
Supervisor	Chun Jason XUE (Supervisor)