Electronic packaging technology is evolving significantly and novel structures have been brought up, such as wafer-level packaging and 3D packaging (with Cu through-vias). Novel interconnection technologies have also been introduced to match the novel packaging designs, including Cu-solder-substrate sandwich structure bonding (by a reflow process or thermo-compression). As this thesis includes the discussion of the ultra-thin solder interconnections and the related reliability issues, it was divided into two main parts.
First, ultra-thin (even down to nano-scale thickness) solder layer samples: Solder-Cu binary and Cu-Solder-Cu sandwich structures (for chip-stacking interconnections) were fabricated by electroplating of pure Sn or SnZn alloy. The special interfacial phenomena were investigated and the evolution of the intermetallic compounds (IMCs) was studied. The solder-depletion phenomenon was firstly reported. The consumption-up of the solder layer stopped the growth of the Cu6Sn5 phase, and it was observed that the growth of the Cu3Sn phase was then based on the reaction between Cu6Sn5 phase and Cu substrate. The micro-voids as well as the formation of the Kirkendall voids at the interfaces were studied to reveal more reliability related issues. The special chemical distribution caused a fast formation of Kirkendall voids, and affected the mechanical strength of the joint interface. The detailed chemical reactions and the atomic diffusion were studied, to clarify the interfacial evolution kinetics.
Second, as a frequently occurred reliability risk, the formation of Sn whiskers on the substrate with thin-solder were also investigated and discussed. For the mechanism, it is believed that the whisker growth on beta-tin (β-Sn) is a relief of compressive stress. In this research, the materials physical theory of the whiskers growth was discussed, with the new hypothesis being brought up, including the sources of the compressive stress. Analysis was conducted based on the products after interactions, including the study of the intermetallic compound crystals nucleation and development, and the grain size and orientation. It was deduced that the compressive stress was from 3 sources: the reactions at the interface of the solder and substrate, the intermetallics formation, and changes in the solder matrix and the oxidation of Sn at the surface of the solder layer. Advanced facilities, such as scanning electron microscope, focused ion-beam and transmission electron microscope, were used addition to the chemical analysis and calculation. The impact of barrier layers such as Au and Ni, and the impact of grain sizes were also thoroughly discussed since they have a significant impact on the compressive stress which forced the whiskers to grow. The critical solder layer thickness for whiskers growth was observed and discussed in details. It was proven that a thinner solder layer might be converted into IMCs, with insufficient solder materials left for the whisker growth. And a thicker solder layer might be taken as plastic which could deform to release the compressive stress and stop the whisker growth.
| Date of Award | 15 Jul 2014 |
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| Original language | English |
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| Awarding Institution | - City University of Hong Kong
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| Supervisor | Yan Cheong CHAN (Supervisor) |
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- Electronic packaging
- Microstructure
- Solder and soldering
Microstructure evolution and failure modes of interconnection with sub-micron solder layers
LI, Q. (Author). 15 Jul 2014
Student thesis: Doctoral Thesis