Memory optimization of embedded systems and software

Abstract

Speed, energy and thermal issues are several important concerns for embedded system and software design, because many embedded systems are real-time system, battery-powered and have a small chip size. The diverging speed rates between processors and main memory imply an impending "Memory Wall". This Memory Wall problem on embedded systems is even more challenging when stringent timing performance is demanded together with low power and low cost constraints. Meanwhile, memory hierarchy introduces large percentage of total energy dissipation and heat buildup. Diminished energy dissipation and power consumption lead to a longer battery life, while reduced temperature hotspots decelerate the physical failure mechanisms. Consequently, techniques for optimizing memory access, such as improving the performance and reducing the energy dissipation and heat buildup, are of paramount significance for embedded systems. Although there have been many studies to bridge the speed gap between processor and memory or reduce energy consumption and hotspots on general systems, more effective techniques for these objectives are needed to fully explore the application-specific nature of embedded systems. This application-specific characteristic enables us to analyze the application's properties and make informed decisions and optimizations before systems beginning to work. Thus, this thesis proposes to investigate new techniques to optimize memory access for the specific applications on embedded systems. The research is carried out on different memory hierarchy levels including register file, cache, and main memory. In particular, the research will focus on solving three problems: register allocation, cache locking, and variable partitioning on main memory banks for embedded systems. 1. In register level, the energy and thermal problems associated with register access of embedded systems are considered. The instruction fetch logic associated with register access has a significant contribution towards the total energy consumption. Meanwhile, the register file has also been previously shown to exhibit the highest temperature compared to the rest of the components in an embedded processor. Therefore, the optimization of energy and the resolution of the thermal issue for register accesses are of great significance. This thesis focuses on register allocation techniques to reduce energy consumption and heat buildup of register accesses for embedded systems. 2. In cache level, the unpredictability and performance issue of cache in embedded systems are considered. The cache locking techniques can manage cache in a predictable manner, which can also reduce the execution time of applications. The selection of instructions to be locked in the instruction cache (I-Cache) has dramatic influence on the performance of real-time embedded systems. Thus, this thesis focuses on the I-Cache locking selection problem to optimize Worst-case execution time (WCET) and Worst-case CPU Utilization (WCU) for real-time embedded systems. The problems on architectures with single-core & single-task, and single-core & multitask, and multi-core & multi-task are studied, respectively. 3. In main memory level, the speed and space problems associated with multibank main memory in embedded systems are considered. For systems with 8-bit micro-controllers or microprocessors that could access only one memory bank at a time, bank switching technique is utilized to switch banks. Bank Selection Instructions (BSLs) need to be inserted into the program to active the right bank, which introduce both runtime (speed) and code size (space) overheads. We find that variable partitioning has crucial impact on these overheads. Thus, this thesis focuses on optimizing variable partitioning and BSL insertion to minimize these speed and space overheads. Reducing the memory and processor performance gap is extremely critical for developing high performance embedded systems. Additionally, optimizations of energy and thermal issue make the system less vulnerable to timing-related intermittent failures, thus enabling larger die sizes. It is believed that the research in this thesis will make great contributions to embedded system research, and the results can be applied in several industries.

Date of Award	15 Feb 2012
Original language	English
Awarding Institution	City University of Hong Kong
Supervisor	Minming LI (Supervisor) & Chun Jason XUE (Co-supervisor)