Design of TX/RX and Modules for High-Data-Rate Terahertz Wireless Communication in CMOS

Abstract

ƒThe realization of high-performance terahertz (THz) Systems-on-Chip (SoCs) in mainstream CMOS technology is severely constrained by fundamental device limitations, prohibitive passive component losses, and a critical predictability gap rooted in manufacturing non-idealities. This thesis presents a systematic, multi-level methodology to overcome these multifaceted challenges, progressing from foundational electromagnetic modeling and component-level innovation to the demonstration of a fully integrated, high-data-rate communication TX/RX chipset. The research reported here establishes a comprehensive and validated framework that demonstrates the viability of silicon for THz technology for next-generation wireless applications.

To confront the pervasive issue of process-mandated dummy metal fills (DMFs), which act as a complex artificial metamaterial and introduce unpredictable performance degradation, a computationally efficient field-averaging homogenization technique is first developed. This approach, which models the dense DMF arrays as an equivalent anisotropic dielectric medium, is rigorously validated through the fabrication and measurement of multiple 300-GHz on-chip antennas. The excellent agreement between simulation and measurement, accurately predicting frequency shifts of up to 13.1%, bridges the gap between electromagnetic theory and practical manufacturability. This predictive model, further elucidated by an equivalent circuit and statistical yield analysis, enables robust, first-pass design success for on-chip radiating systems.

Building upon this reliable modeling foundation, the challenge of efficient on-chip power generation is addressed by pioneering a new paradigm that circumvents the loss limitations of conventional power combiners. A multi-way power amplifier (PA) is co-designed with a power-combining end-fed slot antenna array, effectively shifting the power aggregation from lossy on-chip passive networks into free space. The successful demonstration of a 180-194 GHz 8-way PA, achieving a saturated radiated power of 18.2 dBm and an effective isotropic radiated power (EIRP) of 40.9 dBm, validates this scalable methodology for achieving high output power without the compounding losses inherent in traditional on-chip combining architectures.

To tackle the formidable challenge of amplification near the transistor ƒ_max, where gain is exceptionally scarce, this thesis introduces an innovative amplifier architecture termed the Compensated-Neutralized Transformation Technique (CNTT). This topology systematically co-designs a coupled transmission line with a compensation capacitor in the embedding network, enabling the amplifier stage to operate precisely at the edge of unconditional stability (K_f = 1) for maximum theoretical gain. This approach simultaneously ensures a conjugate input match and facilitates direct cascadability without lossy inter-stage networks. The efficacy of the CNTT is demonstrated through two H-band PAs (213-255 GHz and 255-280 GHz) that achieve state-of-the-art gain-bandwidth products (GBWs) of up to 531 GHz and 490 GHz, gain of 22.1 dB and 29.2dB, respectively, and support high-order modulation schemes.

The culmination of these efforts is the design, fabrication, and demonstration of a fully integrated 254-282 GHz PA-last transmitter and LNA-first receiver chipsets. Leveraging the high-gain, low-noise performance enabled by the CNTT, the transmitter achieves a saturated output power of 2.1 dBm and an EIRP of 31.3 dBm, while the receiver demonstrates a competitive system noise figure of 11.9 dB. The transmitter and receiver chipsets validate the system-level efficacy of the proposed techniques by establishing a robust communication link, achieving data rates of 115, 84, 72, and 40 Gb/s over distances of 0.16, 0.5, 1, and 3 meters, respectively. Collectively, this body of work provides a holistic design framework and a suite of validated circuit and system techniques that dismantle key barriers to silicon-based THz systems, paving the way for the next era of ubiquitous high-frequency applications.

Date of Award	28 Jan 2026
Original language	English
Awarding Institution	City University of Hong Kong
Supervisor	Chi Hou CHAN (Supervisor) & Hang WONG (Co-supervisor)