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Boundary sampling approximation for VLSI circuit design optimisation

  • Kim Tsang CHAN

Student thesis: Master's Thesis

Date of Award30 Jul 1999
Original languageEnglish
Awarding Institution
  • City University of Hong Kong
SupervisorKwok Ming Angus WU (Supervisor)

Keywords

  • Very large scale integration
  • Integrated circuits
  • Design and construction

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