Write activity minimization for nonvolatile main memory via scheduling and recomputation
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Author(s)
Related Research Unit(s)
Detail(s)
Original language | English |
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Article number | 5737850 |
Pages (from-to) | 584-592 |
Journal / Publication | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Volume | 30 |
Issue number | 4 |
Publication status | Published - Apr 2011 |
Link(s)
Abstract
Nonvolatile memories such as Flash memory, phase change memory (PCM), and magnetic random access memory (MRAM) have many desirable characteristics for embedded systems to employ them as main memory. However, there are two common challenges we need to answer before we can apply nonvolatile memory as main memory practically. First, nonvolatile memory has limited write/erase cycles compared to DRAM. Second, a write operation is slower than a read operation on nonvolatile memory. These two challenges can be answered by reducing the number of write activities on nonvolatile main memory. In this paper, we proposed two optimization techniques, write-aware scheduling and recomputation, to minimize write activities on nonvolatile memory. With the proposed techniques, we can both speed up the completion time of programs and extend nonvolatile memory's lifetime. The experimental results show that the proposed techniques can reduce the number of write activities on nonvolatile memory by 55.71% on average. Thus, the lifetime of nonvolatile memory is extended to 2.5 times as long as before on average. The completion time of programs can be reduced by 56.67% on systems with NOR Flash memory and by 47.63% on systems with NAND Flash memory on average. © 2006 IEEE.
Research Area(s)
- Data recomputation, Flash memory, MRAM, nonvolatile memory, phase change memory, scheduling, SPM
Citation Format(s)
Write activity minimization for nonvolatile main memory via scheduling and recomputation. / Hu, Jingtong; Tseng, Wei-Che; Xue, Chun Jason et al.
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 30, No. 4, 5737850, 04.2011, p. 584-592.
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 30, No. 4, 5737850, 04.2011, p. 584-592.
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review