Voltage-balance limits in four-level diode-clamped converters with passive front ends

Josep Pou, Rafael Pindado, Dushan Boroyevich

Research output: Journal Publications and ReviewsRGC 21 - Publication in refereed journalpeer-review

Abstract

Multilevel diode-clamped converters with more than three levels cannot maintain voltage balance in the dc-link capacitors for some operating conditions due to the existence of dc currents in the middle points. Since capacitors are either completely charged or discharged for those conditions, this circumstance severely limits practical application of these converters. The limit explored in this paper is that the four-level converter cannot achieve voltage balance. Proper redundant vectors are selected in the space-vector diagram so that a quadratic parameter related to the currents in the middle points is minimized. © 2005 IEEE.
Original languageEnglish
Pages (from-to)190-196
JournalIEEE Transactions on Industrial Electronics
Volume52
Issue number1
DOIs
Publication statusPublished - Feb 2005
Externally publishedYes

Bibliographical note

Publication details (e.g. title, author(s), publication statuses and dates) are captured on an “AS IS” and “AS AVAILABLE” basis at the time of record harvesting from the data source. Suggestions for further amendments or supplementary information can be sent to [email protected].

Funding

Manuscript received January 10, 2004; revised July 9, 2004. Abstract published on the Internet September 10, 2004. This work was supported by the Departament d’Universitats, Recerca i Societat de la Informació, Generalitat de Catalunya, under Grant 2000BEAI200225 and by the Ministerio de Ciencia y Tecnología of Spain under Project DPI2001-2213. This work made use of ERC Shared Facilities supported by the National Science Foundation under Award EEC-9731677. This paper was presented at the IEEE Industrial Electronics Society Annual Conference (IECON’02), Nov. 5–8, 2002, Seville, Spain.

Research Keywords

  • Four-level inverter
  • Multilevel inverter
  • Nearest vectors
  • Passive front ends
  • Space-vector modulation (SVM)
  • Voltage balance

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