VLSI-implementable classically conditioned neural elements

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)peer-review

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Author(s)

  • Novat Nintunze
  • Angus Wu
  • Pichet Chintrakulchai
  • Jack Meador

Detail(s)

Original languageEnglish
Title of host publicationMidwest Symposium on Circuits and Systems
PublisherPubl by IEEE
Pages281-284
Volume1
ISBN (Print)780300815
Publication statusPublished - 1991
Externally publishedYes

Publication series

Name
Volume1

Conference

Title33rd Midwest Symposium on Circuits and Systems
CityCalgary, Alberta, Can
Period12 - 15 August 1990

Abstract

Hardware implementation of the phenomena of classical conditioning is discussed. The circuits are built around a programmable floating gate synapse studied in earlier works and thought to be a part of an impulse neural network. Simulation results related to phenomena such as acquisition and its extinction, blocking and second order conditioning are presented. The methodology followed is that of using specialized cells. This method further allows the realization of phenomena currently under investigation such as facilitation, sensitization and habituation. Current research involves the use of pulse coded Hebbian laws in search of economical circuitry for VLSI implementation.

Citation Format(s)

VLSI-implementable classically conditioned neural elements. / Nintunze, Novat; Wu, Angus; Chintrakulchai, Pichet; Meador, Jack.

Midwest Symposium on Circuits and Systems. Vol. 1 Publ by IEEE, 1991. p. 281-284.

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)peer-review