Skip to main navigation Skip to search Skip to main content

Toward Practical Code-Based Signature: Implementing Fast and Compact QC-LDGM Signature Scheme on Embedded Hardware

Research output: Journal Publications and ReviewsRGC 21 - Publication in refereed journalpeer-review

Abstract

In this paper, fast and compact implementations for code-based signature are presented. Existing designs are either using enormous memory storage or suffering from slow issuing speed of signatures. A vastly optimized new design solving these problems is proposed by exploiting quasi-cyclic low-density generator matrix codes at different levels. In particular, this paper provides a new algorithmic enhancement of signature generation and gives detailed and optimized solutions for critical steps of this algorithm. The design presented in this paper is the fastest implementation of code-based signatures in open literature. It is shown, for instance, that our implementation of signature generation engine can generate approximately 60,000 signatures per second on a Xilinx Virtex-6 FPGA, requiring only 5992 slices and 60 memory blocks. In addition, a very compact implementation is also provided, producing 5438 signatures per second with only 18 memory blocks.
Original languageEnglish
Article number7891573
Pages (from-to)2086-2097
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume64
Issue number8
DOIs
Publication statusPublished - Aug 2017

Research Keywords

  • CFS signature scheme
  • Code-based cryptography
  • FPGA
  • QC-LDGM code

Fingerprint

Dive into the research topics of 'Toward Practical Code-Based Signature: Implementing Fast and Compact QC-LDGM Signature Scheme on Embedded Hardware'. Together they form a unique fingerprint.

Cite this