Three-way out-of-phase power divider
Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review
Author(s)
Related Research Unit(s)
Detail(s)
| Original language | English |
|---|---|
| Pages (from-to) | 482-483 |
| Journal / Publication | Electronics Letters |
| Volume | 44 |
| Issue number | 7 |
| Publication status | Published - 2008 |
Link(s)
Abstract
For the first time, a novel three-way out-of-phase power divider designed based on the double-sided parallel-strip line (DSPSL), is proposed. The outputs provide one in-phase port and two out-of-phase, which are largely insensitive to frequency variations over a broad bandwidth. The total length of the circuit is half a wavelength. The design procedure of the power divider is given. Experimental results show that the power divider can achieve good matching, high isolation, balanced amplitude, and an approximately constant phase difference from 1 to 2.6GHz. © The Institution of Engineering and Technology 2008.
Citation Format(s)
Three-way out-of-phase power divider. / Yang, T.; Chen, J. X.; Xue, Q.
In: Electronics Letters, Vol. 44, No. 7, 2008, p. 482-483.Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review
