Techniques for Improving Block Error Rate of LDPC Decoders

X. Zheng; F. C. M. Lau; C. K. Tse; S. C. Wong

doi:10.1109/iscas.2006.1693071

Techniques for Improving Block Error Rate of LDPC Decoders

X. Zheng, F. C. M. Lau, C. K. Tse, S. C. Wong

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

2 Citations (Scopus)

Abstract

In the study of Low-Density-Parity-Check (LDPC) codes, most researchers are interested in their bit error rate performance. However, BLock Error Rate (BLER) is another important measure of the system performance because it provides the rate at which the blocks/packets need to be re-sent again - the smaller the better. In this paper, we apply a simple feedback technique to the decoding of LDPC codes. Extensive simulations have been performed. Results show that the proposed method can effectively improve the BLER of the codes at the waterfall region while not degrading the BER performance at the high SNR region. ©2006 IEEE.

Original language	English
Title of host publication	ISCAS 2006 - 2006 IEEE International Symposium on Circuits and Systems, PROCEEDINGS
Pages	2261-2264
DOIs	https://doi.org/10.1109/iscas.2006.1693071
Publication status	Published - May 2006
Externally published	Yes
Event	2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006): Circuits and Systems: At Crossroads of Life and Technology - Island of Kos, Greece Duration: 21 May 2006 → 24 May 2006

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4302
ISSN (Electronic)	2158-1525

Conference

Conference	2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006)
Abbreviated title	ISCAS2006
Country/Territory	Greece
City	Island of Kos
Period	21/05/06 → 24/05/06

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@inproceedings{5f5ae12da21c438d9fe6bf2d6ae07922,

title = "Techniques for Improving Block Error Rate of LDPC Decoders",

abstract = "In the study of Low-Density-Parity-Check (LDPC) codes, most researchers are interested in their bit error rate performance. However, BLock Error Rate (BLER) is another important measure of the system performance because it provides the rate at which the blocks/packets need to be re-sent again - the smaller the better. In this paper, we apply a simple feedback technique to the decoding of LDPC codes. Extensive simulations have been performed. Results show that the proposed method can effectively improve the BLER of the codes at the waterfall region while not degrading the BER performance at the high SNR region. {\textcopyright}2006 IEEE.",

author = "X. Zheng and Lau, {F. C. M.} and Tse, {C. K.} and Wong, {S. C.}",

year = "2006",

month = may,

doi = "10.1109/iscas.2006.1693071",

language = "English",

isbn = "0780393902",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

pages = "2261--2264",

booktitle = "ISCAS 2006 - 2006 IEEE International Symposium on Circuits and Systems, PROCEEDINGS",

note = "2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006) : Circuits and Systems: At Crossroads of Life and Technology, ISCAS2006 ; Conference date: 21-05-2006 Through 24-05-2006",

}

Zheng, X, Lau, FCM, Tse, CK & Wong, SC 2006, Techniques for Improving Block Error Rate of LDPC Decoders. in ISCAS 2006 - 2006 IEEE International Symposium on Circuits and Systems, PROCEEDINGS., 1693071, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 2261-2264, 2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006), Island of Kos, Greece, 21/05/06. https://doi.org/10.1109/iscas.2006.1693071

Techniques for Improving Block Error Rate of LDPC Decoders. / Zheng, X.; Lau, F. C. M.; Tse, C. K. et al.
ISCAS 2006 - 2006 IEEE International Symposium on Circuits and Systems, PROCEEDINGS. 2006. p. 2261-2264 1693071 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

TY - GEN

T1 - Techniques for Improving Block Error Rate of LDPC Decoders

AU - Zheng, X.

AU - Lau, F. C. M.

AU - Tse, C. K.

AU - Wong, S. C.

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Y1 - 2006/5

N2 - In the study of Low-Density-Parity-Check (LDPC) codes, most researchers are interested in their bit error rate performance. However, BLock Error Rate (BLER) is another important measure of the system performance because it provides the rate at which the blocks/packets need to be re-sent again - the smaller the better. In this paper, we apply a simple feedback technique to the decoding of LDPC codes. Extensive simulations have been performed. Results show that the proposed method can effectively improve the BLER of the codes at the waterfall region while not degrading the BER performance at the high SNR region. ©2006 IEEE.

AB - In the study of Low-Density-Parity-Check (LDPC) codes, most researchers are interested in their bit error rate performance. However, BLock Error Rate (BLER) is another important measure of the system performance because it provides the rate at which the blocks/packets need to be re-sent again - the smaller the better. In this paper, we apply a simple feedback technique to the decoding of LDPC codes. Extensive simulations have been performed. Results show that the proposed method can effectively improve the BLER of the codes at the waterfall region while not degrading the BER performance at the high SNR region. ©2006 IEEE.

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DO - 10.1109/iscas.2006.1693071

M3 - RGC 32 - Refereed conference paper (with host publication)

SN - 0780393902

SN - 9780780393905

SN - 0780393899

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

SP - 2261

EP - 2264

BT - ISCAS 2006 - 2006 IEEE International Symposium on Circuits and Systems, PROCEEDINGS

T2 - 2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006)

Y2 - 21 May 2006 through 24 May 2006

ER -

Techniques for Improving Block Error Rate of LDPC Decoders

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