Task allocation on nonvolatile-memory-based hybrid main memory
Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review
Author(s)
Related Research Unit(s)
Detail(s)
Original language | English |
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Article number | 6268363 |
Pages (from-to) | 1271-1284 |
Journal / Publication | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 21 |
Issue number | 7 |
Online published | 14 Aug 2012 |
Publication status | Published - Jul 2013 |
Link(s)
Abstract
In this paper, we consider the task allocation problem on a hybrid main memory composed of nonvolatile memory (NVM) and dynamic random access memory (DRAM). Compared to the conventional memory technology DRAM, the emerging NVM has excellent energy performance since it consumes orders of magnitude less leakage power. On the other hand, most types of NVMs come with the disadvantages of much shorter write endurance and longer write latency as opposed to DRAM. By leveraging the energy efficiency of NVM and long write endurance of DRAM, this paper explores task allocation techniques on hybrid memory for multiple objectives such as minimizing the energy consumption, extending the lifetime, and minimizing the memory size. The contributions of this paper are twofold. First, we design the integer linear programming (ILP) formulations that can solve different objectives optimally. Then, we propose two sets of heuristic algorithms including three polynomial time offline heuristics and three online heuristics. Experiments show that compared to the optimal solutions generated by the ILP formulations, the offline heuristics can produce near-optimal results. © 1993-2012 IEEE.
Research Area(s)
- Hybrid main memory, integer linear programming (ILP), nonvolatile memory (NVM)
Citation Format(s)
Task allocation on nonvolatile-memory-based hybrid main memory. / Tian, Wanyong; Zhao, Yingchao; Shi, Liang; Li, Qingan; Li, Jianhua; Xue, Chun Jason; Li, Minming; Chen, Enhong.
In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 21, No. 7, 6268363, 07.2013, p. 1271-1284.Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review