Survey of Cache analysis for worst-case execution time estimation

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

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Author(s)

Detail(s)

Original languageEnglish
Pages (from-to)179-199
Journal / PublicationRuan Jian Xue Bao/Journal of Software
Volume25
Issue number2
Publication statusPublished - Feb 2014
Externally publishedYes

Abstract

The main task of real-time system design is to analyze the timing behaviors of a system at design time in order to guarantee that the given timing constraints are met at run time. The key issue is to estimate the Worst-Case Execution Time (WCET) of a program. Typically the WCET is heavily influenced by the hardware features of the target processor, among which Cache is the most influential factor. This article presents a survey on Cache analysis for WCET estimation. It introduces main research problems and challenges in different dimensions, such as the analysis of loops, data caches, multi-level caches, multi-core shared caches, non-LRU replacement policies, etc. The mainstream analysis techniques with their pros and cons are evaluated. An outlook for future research directions of Cache analysis is given in the end. © Copyright 2014, Institute of Software, the Chinese Academy of Sciences. All rights reserved.

Research Area(s)

  • Abstract interpretation, Cache analysis, Real-time system, Timing analysis, WCET (worst-case execution time)

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