Abstract
The plasma-induced near-surface damage in III-V based devices was examined. Surface defects can be minimized by using low ion energy and high ion flux for etching. An effective way to remove surface damage is by etching or passivating the etched surface with low energy chlorine species. Surface damage for in-plane gated (IPG) quantum wire transistors and heterostructure bipolar transistors (HBT) can be reduced substantially by surface passivation or by etching with a two-step approach.
| Original language | English |
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| Title of host publication | International Symposium on Plasma Process-Induced Damage, P2ID, Proceedings |
| Publisher | IEEE |
| Pages | 50-55 |
| Publication status | Published - 1998 |
| Externally published | Yes |
| Event | Proceedings of the 1998 3rd International Symposium on Plasma Process-Induced Damage, P2ID - Honolulu, HI, USA Duration: 4 Jun 1998 → 5 Jun 1998 |
Conference
| Conference | Proceedings of the 1998 3rd International Symposium on Plasma Process-Induced Damage, P2ID |
|---|---|
| City | Honolulu, HI, USA |
| Period | 4/06/98 → 5/06/98 |
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