Study of thin gate dielectric films using deep level transient spectroscopy

Y. H. Poon, H. Wong

Research output: Journal Publications and ReviewsRGC 21 - Publication in refereed journalpeer-review

5 Citations (Scopus)

Abstract

This work studies the hole trap distributions at the thin oxide and nitrided-oxide interface using the Deep Level Transient Spectroscopy (DLTS) technique which was found to be not suitable for very thin oxide. By biasing the MIS capacitor at weak inversion, the fluctuation due to minority carrier capture is minimized and the weak DLTS signals in the thin-gate (16.8 nm) capacitors are recorded. The proposed weak inversion technique also provides a hint for probing hole trap distribution near the valence band edge. However, a large offset in the trap level is found and needed to be calibrated. It is found in re-oxidized insulator that the highest interface trap level is about 3.5×1012 eV-1 cm-2 over the lower half band while for that of the nitrided oxide, it is just above half of the value. In addition, the capture cross-section for the nitrided samples is found to be of similar magnitude as well as temperature dependent. This phenomenon suggests that the states are of similar nature. The trends of the capture cross-section for the three samples support the model of lattice relaxation multiphonon emission.
Original languageEnglish
Pages (from-to)451-458
JournalMicroelectronics Journal
Volume31
Issue number6
DOIs
Publication statusPublished - 30 Jun 2000

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