TY - GEN
T1 - STABILITY ANALYSIS OF POWER CIRCUIT COMPRISING VIRTUAL INDUCTANCE
AU - Dranga, O.
AU - Funato, H.
AU - Ogasawara, S.
AU - Tse, C.K.
AU - Iu, H.H.C.
PY - 2004/5
Y1 - 2004/5
N2 - The concept of a variable active-passive reactance (VAPAR), which can generate a virtual variable inductance in power circuits, including negative values, has already been proposed. Since it has found applications in the power flow control of power systems, where the power flow is essentially restricted by a line inductance, the aim of the paper is to report on the stability of this virtual inductance in an RL circuit. The periodic steady-state operation of the variable-structure, piecewise-linear, nonlinear system is modeled by its Poincaré map. The stability criterion employs the position of the eigenvalues of the Jacobian matrix of the Poincaré map, evaluated at its fixed point. Bifurcation behaviour when varying the virtual inductance is revealed. Such an analysis allows accurate prediction of stability boundaries and facilitates the selection of parameter values to guarantee stable operation.
AB - The concept of a variable active-passive reactance (VAPAR), which can generate a virtual variable inductance in power circuits, including negative values, has already been proposed. Since it has found applications in the power flow control of power systems, where the power flow is essentially restricted by a line inductance, the aim of the paper is to report on the stability of this virtual inductance in an RL circuit. The periodic steady-state operation of the variable-structure, piecewise-linear, nonlinear system is modeled by its Poincaré map. The stability criterion employs the position of the eigenvalues of the Jacobian matrix of the Poincaré map, evaluated at its fixed point. Bifurcation behaviour when varying the virtual inductance is revealed. Such an analysis allows accurate prediction of stability boundaries and facilitates the selection of parameter values to guarantee stable operation.
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U2 - 10.1109/iscas.2004.1329118
DO - 10.1109/iscas.2004.1329118
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 078038251X
VL - 4
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 772
EP - 775
BT - Proceedings - IEEE International Symposium on Circuits and Systems
T2 - 2004 IEEE International Symposium on Cirquits and Systems - Proceedings
Y2 - 23 May 2004 through 26 May 2004
ER -