Speed scaling problems with memory/cache consideration

Speed scaling problems consider energy-efficient job scheduling in processors by adjusting the speed to reduce energy consumption, where power consumption is a convex function of speed (usually, P(s) = s^α, α = 2, 3). In this work, we study speed scaling problems considering memory/cache. Each job needs some time for memory operation when it is fetched from memory, and needs less time if fetched from the cache. The objective is to minimize energy consumption while satisfying the time constraints of the jobs. Two models are investigated, the non-cache model and the with-cache model. The non-cache model is a variant of the ideal model, where each job i needs a fixed c_i time for its memory operation; the with-cache model further considers the cache, a memory device with much faster access time but limited space. The uniform with-cache model is a special case of the with-cache model in which all c_i values are the same. We provide an O(n³) time algorithm and an improved O(n² log n) time algorithm to compute the optimal solution in the non-cache model. For the with-cache model, we prove that it is NP-complete to compute the optimal solution. For the uniform with-cache model with agreeable jobs (later-released jobs do not have earlier deadlines), we derive an O(n⁴) time algorithm to compute the optimal schedule, while for the general case we propose a (2α g/g−1 )α/2-approximation algorithm in a resource augmentation setting in which the memory operation time can accelerate by at most g times.