Speech processing on a reconfigurable analog platform
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Author(s)
Detail(s)
| Original language | English |
|---|---|
| Article number | 6450118 |
| Pages (from-to) | 430-433 |
| Journal / Publication | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| Volume | 22 |
| Issue number | 2 |
| Publication status | Published - Feb 2014 |
| Externally published | Yes |
Link(s)
Abstract
We describe architectures for audio classification front ends on a reconfigurable analog platform. Real-time implementation of audio processing algorithms involving discrete-time signals tend to be power-intensive. We present an alternate continuous-time system implementation of a noise-suppression algorithm on our reconfigurable chip, while detailing the design considerations. We also describe a framework that enables future implementations of other speech processing algorithms, classifier front ends, and hearing aids. © 1993-2012 IEEE.
Research Area(s)
- Analog signal processing (ASP), noise suppression, reconfigurable, trans-linear
Bibliographic Note
Publication details (e.g. title, author(s), publication statuses and dates) are captured on an “AS IS” and “AS AVAILABLE” basis at the time of record harvesting from the data source. Suggestions for further amendments or supplementary information can be sent to [email protected].
Citation Format(s)
Speech processing on a reconfigurable analog platform. / Ramakrishnan, Shubha; Basu, Arindam; Chiu, Leung Kin et al.
In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 22, No. 2, 6450118, 02.2014, p. 430-433.
In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 22, No. 2, 6450118, 02.2014, p. 430-433.
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
