Single-ZnO-Nanowire Memory

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

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Author(s)

  • Yen-De Chiang
  • Wen-Yuan Chang
  • Ching-Yuan Ho
  • Cheng-Ying Chen
  • Chih-Hsiang Ho
  • Su-Jien Lin
  • Tai-Bor Wu

Detail(s)

Original languageEnglish
Article number5741715
Pages (from-to)1735-1740
Journal / PublicationIEEE Transactions on Electron Devices
Volume58
Issue number6
Online published5 Apr 2011
Publication statusPublished - Jun 2011
Externally publishedYes

Abstract

Single-ZnO-nanowire (NW) memory based on resistive switching is demonstrated for the first time. The NW memory is stable, rewritable, and nonvolatile with on/off ratio up to 7.7 × 105. The O vacancies at the surfaces of ZnO NWs and around the interface of Ti/ZnO NWs observed using X-ray phototelectron spectroscopy, transmission electron microscopy (TEM), selected-area electron diffraction, and high-resolution TEM might play a role in the resistive switching behavior. The endurance of resistive switching can be enhanced by further increasing the sweeping voltage. This paper brings an exciting possibility of building next-generation memory devices based on NWs.

Research Area(s)

  • Nanowire (NW), resistance random access memory (ReRAM), resistive switching, space-charge-limited (SCL) conduction, ZnO

Citation Format(s)

Single-ZnO-Nanowire Memory. / Chiang, Yen-De; Chang, Wen-Yuan; Ho, Ching-Yuan; Chen, Cheng-Ying; Ho, Chih-Hsiang; Lin, Su-Jien; Wu, Tai-Bor; He, Jr-Hau.

In: IEEE Transactions on Electron Devices, Vol. 58, No. 6, 5741715, 06.2011, p. 1735-1740.

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review