Simulation Design for Security Testing of Integrated Electronic Systems
Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review
Author(s)
Related Research Unit(s)
Detail(s)
| Original language | English |
|---|---|
| Pages (from-to) | 159-165 |
| Journal / Publication | IEEE Network |
| Volume | 34 |
| Issue number | 1 |
| Online published | 2 Aug 2019 |
| Publication status | Published - Jan 2020 |
Link(s)
Abstract
IESs have a wide range of applications and special usage scenarios, but they are also expensive. Hence, it is common that a simulation platform is used to conduct security experiments on IESs, as well as to validate changes on the system and protocols. This article proposes a simulation framework based on a combination of hardware and software. This approach preserves the hardware characteristics of the system and has the flexibility of software simulation, making it ideal for analyzing and validating the security of IESs. We also implement some security attacks against IESs based on the simulation system for in-depth research.
Research Area(s)
- Data models, Hardware, Protocols, Satellites, Security, Software, Testing
Citation Format(s)
Simulation Design for Security Testing of Integrated Electronic Systems. / He, Daojing; Qiao, Qi; Gao, Jiahao et al.
In: IEEE Network, Vol. 34, No. 1, 01.2020, p. 159-165.Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review
