Scheduling to Optimize Cache Utilization for Non-Volatile Main Memories

Jingtong Hu; Qingfeng Zhuge; Chun Jason Xue; Wei-Che Tseng; Shouzhen Gu; Edwin H.-M. Sha

doi:10.1109/TC.2013.11

Scheduling to Optimize Cache Utilization for Non-Volatile Main Memories

Jingtong Hu
, Qingfeng Zhuge^*
, Chun Jason Xue
, Wei-Che Tseng
, Shouzhen Gu
, Edwin H.-M. Sha

^*Corresponding author for this work

Department of Computer Science

Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

11 Citations (Scopus)

Abstract

In power and size sensitive embedded systems, non-volatile memories (NVMs) are replacing DRAM as the main memory since they have higher density, lower static power consumption, and lower costs. Unfortunately, these technologies are limited by their endurance and long write latencies. To minimize the main memory access time and extend the lifetime of the NVM, we optimally schedule tasks by an ILP formulation. We also present a heuristic, Concatenation Scheduling, to solve large problems in a reasonable amount of time. Our experimental results show that when compared with list scheduling, concatenation scheduling can reduce the total memory access time by an average of 9.99% and increase the lifetime of the NVM by 26.66%. When compared with list scheduling, ILP can reduce the total memory access time by an average of 12.39% and increase the lifetime of the NVM by 38.74%. © 2013 IEEE.

Original language	English
Article number	6409835
Pages (from-to)	2039-2051
Journal	IEEE Transactions on Computers
Volume	63
Issue number	8
Online published	10 Jan 2013
DOIs	https://doi.org/10.1109/TC.2013.11
Publication status	Published - Aug 2014

Funding

This work was supported in part by China National 863 Program 2013AA013202, Chongqing cstc2012ggC40005, NSFC 61173014, NSF CNS-1015802 and in part by Grants from the Research Grants Council of the Hong Kong Special Administrative Region, China [Project CityU 123811 and 123210].

Research Keywords

Cache memories
memory management
primary memory
real-time and embedded systems

RGC Funding Information

RGC-funded

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10.1109/TC.2013.11

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title = "Scheduling to Optimize Cache Utilization for Non-Volatile Main Memories",

abstract = "In power and size sensitive embedded systems, non-volatile memories (NVMs) are replacing DRAM as the main memory since they have higher density, lower static power consumption, and lower costs. Unfortunately, these technologies are limited by their endurance and long write latencies. To minimize the main memory access time and extend the lifetime of the NVM, we optimally schedule tasks by an ILP formulation. We also present a heuristic, Concatenation Scheduling, to solve large problems in a reasonable amount of time. Our experimental results show that when compared with list scheduling, concatenation scheduling can reduce the total memory access time by an average of 9.99\% and increase the lifetime of the NVM by 26.66\%. When compared with list scheduling, ILP can reduce the total memory access time by an average of 12.39\% and increase the lifetime of the NVM by 38.74\%. {\textcopyright} 2013 IEEE.",

keywords = "Cache memories, memory management, primary memory, real-time and embedded systems",

author = "Jingtong Hu and Qingfeng Zhuge and Xue, \{Chun Jason\} and Wei-Che Tseng and Shouzhen Gu and Sha, \{Edwin H.-M.\}",

year = "2014",

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TY - JOUR

T1 - Scheduling to Optimize Cache Utilization for Non-Volatile Main Memories

AU - Hu, Jingtong

AU - Zhuge, Qingfeng

AU - Xue, Chun Jason

AU - Tseng, Wei-Che

AU - Gu, Shouzhen

AU - Sha, Edwin H.-M.

PY - 2014/8

Y1 - 2014/8

N2 - In power and size sensitive embedded systems, non-volatile memories (NVMs) are replacing DRAM as the main memory since they have higher density, lower static power consumption, and lower costs. Unfortunately, these technologies are limited by their endurance and long write latencies. To minimize the main memory access time and extend the lifetime of the NVM, we optimally schedule tasks by an ILP formulation. We also present a heuristic, Concatenation Scheduling, to solve large problems in a reasonable amount of time. Our experimental results show that when compared with list scheduling, concatenation scheduling can reduce the total memory access time by an average of 9.99% and increase the lifetime of the NVM by 26.66%. When compared with list scheduling, ILP can reduce the total memory access time by an average of 12.39% and increase the lifetime of the NVM by 38.74%. © 2013 IEEE.

AB - In power and size sensitive embedded systems, non-volatile memories (NVMs) are replacing DRAM as the main memory since they have higher density, lower static power consumption, and lower costs. Unfortunately, these technologies are limited by their endurance and long write latencies. To minimize the main memory access time and extend the lifetime of the NVM, we optimally schedule tasks by an ILP formulation. We also present a heuristic, Concatenation Scheduling, to solve large problems in a reasonable amount of time. Our experimental results show that when compared with list scheduling, concatenation scheduling can reduce the total memory access time by an average of 9.99% and increase the lifetime of the NVM by 26.66%. When compared with list scheduling, ILP can reduce the total memory access time by an average of 12.39% and increase the lifetime of the NVM by 38.74%. © 2013 IEEE.

KW - Cache memories

KW - memory management

KW - primary memory

KW - real-time and embedded systems

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DO - 10.1109/TC.2013.11

M3 - RGC 21 - Publication in refereed journal

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JO - IEEE Transactions on Computers

JF - IEEE Transactions on Computers

IS - 8

M1 - 6409835

ER -

Scheduling to Optimize Cache Utilization for Non-Volatile Main Memories

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Research Keywords

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