TY - GEN
T1 - Redesigning software and systems for non-volatile processors on self-powered devices
AU - Zhao, Mengying
AU - Qiu, Keni
AU - Xie, Yuan
AU - Hu, Jingtong
AU - Xue, Chun Jason
PY - 2016
Y1 - 2016
N2 - Wearable devices gain increasing popularity since they can collect important information for healthcare and well-being purposes. Compared with battery, energy harvesting is a better power source for these wearable devices due to many advantages. However, harvested energy is naturally unstable and program execution will be interrupted frequently. Nonvolatile processor (NVP) demonstrates promising advantages to back up volatile state before the system energy is depleted. Due to the backup and resumption procedures resulted from frequent power failures, non-volatile processor exhibits different characteristics from traditional processors, necessitating a set of adaptive design and optimization strategies. Recently, there have been both hardware and software researches aiming to develop correct and efficient non-volatile processors. In this paper, we summarize the software-level techniques for NVP, covering error-correctness schemes, backup timing determination, backup content optimization, adaptive software modifications and NVP simulators and tools, to provide an overview of state-of-the-art NVP research from the software and system level. © 2016 by IEEE.
AB - Wearable devices gain increasing popularity since they can collect important information for healthcare and well-being purposes. Compared with battery, energy harvesting is a better power source for these wearable devices due to many advantages. However, harvested energy is naturally unstable and program execution will be interrupted frequently. Nonvolatile processor (NVP) demonstrates promising advantages to back up volatile state before the system energy is depleted. Due to the backup and resumption procedures resulted from frequent power failures, non-volatile processor exhibits different characteristics from traditional processors, necessitating a set of adaptive design and optimization strategies. Recently, there have been both hardware and software researches aiming to develop correct and efficient non-volatile processors. In this paper, we summarize the software-level techniques for NVP, covering error-correctness schemes, backup timing determination, backup content optimization, adaptive software modifications and NVP simulators and tools, to provide an overview of state-of-the-art NVP research from the software and system level. © 2016 by IEEE.
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UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-85006784954&origin=recordpage
U2 - 10.1109/VLSI-SoC.2016.7753544
DO - 10.1109/VLSI-SoC.2016.7753544
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 978-1-5090-3562-5
BT - 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
PB - IEEE
T2 - 24th Annual IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2016)
Y2 - 26 September 2016 through 28 September 2016
ER -