Redesigning software and systems for non-volatile processors on self-powered devices

Mengying Zhao, Keni Qiu*, Yuan Xie, Jingtong Hu, Chun Jason Xue

*Corresponding author for this work

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

15 Citations (Scopus)

Abstract

Wearable devices gain increasing popularity since they can collect important information for healthcare and well-being purposes. Compared with battery, energy harvesting is a better power source for these wearable devices due to many advantages. However, harvested energy is naturally unstable and program execution will be interrupted frequently. Nonvolatile processor (NVP) demonstrates promising advantages to back up volatile state before the system energy is depleted. Due to the backup and resumption procedures resulted from frequent power failures, non-volatile processor exhibits different characteristics from traditional processors, necessitating a set of adaptive design and optimization strategies. Recently, there have been both hardware and software researches aiming to develop correct and efficient non-volatile processors. In this paper, we summarize the software-level techniques for NVP, covering error-correctness schemes, backup timing determination, backup content optimization, adaptive software modifications and NVP simulators and tools, to provide an overview of state-of-the-art NVP research from the software and system level. © 2016 by IEEE.
Original languageEnglish
Title of host publication2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
PublisherIEEE
Number of pages6
ISBN (Electronic)9781509035618
ISBN (Print)978-1-5090-3562-5
DOIs
Publication statusPublished - 2016
Event24th Annual IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2016) - Tallinn, Estonia
Duration: 26 Sept 201628 Sept 2016

Publication series

Name
ISSN (Electronic)2324-8440

Conference

Conference24th Annual IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2016)
PlaceEstonia
CityTallinn
Period26/09/1628/09/16

Funding

This work is partially supported by The Fundamental Research Funds of Shandong University (No. 2016HW002), a grant from the Research Grants Council of the Hong Kong Special Administrative Region, China (Project No. CityU 11214115), the PhD Start-up Fund of Natural Science Foundation of Guangdong Province, China (No. 2014A030310344), the Project of Construction of Innovative Teams and Teacher Career Development for Universities and Colleges Under Beijing Municipality (Project No. IDHT20150507), Beijing Advanced Innovation Center for Imaging Technology, National Natural Science Foundation of China (Project No. 61472260, 61402302 and 61502321).

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