Reconfigurable elliptic curve cryptosystems on a chip

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)peer-review

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Author(s)

Detail(s)

Original languageEnglish
Title of host publicationProceedings -Design, Automation and Test in Europe, DATE '05
Pages24-29
VolumeI
Publication statusPublished - 2005
Externally publishedYes

Publication series

Name
VolumeI
ISSN (Print)1530-1591

Conference

TitleDesign, Automation and Test in Europe (DATE '05)
PlaceGermany
CityMunich
Period7 - 11 March 2005

Abstract

This paper presents a System-on-a-Chip (SoC) architecture for Elliptic Curve Cryptosystems (ECC) which targets reconfigurable hardware, A four-level partitioning scheme is described for exploring the area and speed trade-offs. A design generator is used to generate parameterisable building blocks for the configurable SoC architecture. A secure web server, which runs on a reconfigurable soft-processor and an embedded hard-processor, shows over 2000 times speedup when the computationally-intensive operations run on the customised building blocks. The embedded on-chip timer block gives accurate performance information. The design factors of configurable SoC architectures are also discussed and evaluated.

Citation Format(s)

Reconfigurable elliptic curve cryptosystems on a chip. / Cheung, Ray C. C.; Luk, Wayne; Cheung, Peter Y. K.

Proceedings -Design, Automation and Test in Europe, DATE '05. Vol. I 2005. p. 24-29 1395523.

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)peer-review