Abstract
Real-time task scheduling becomes even more challenging with the emerging of island-based multi-core architecture, where the local memory module of an island offers shorter access time than the global memory module does. With such a popular architecture design in mind, this paper exploits real-time task scheduling over island-based homogeneous cores with local and global memory pools. Joint considerations of real-time scheduling and memory allocation are presented to efficiently use the computing and memory resources. A polynomial-time algorithm with an asymptotic 4-approximation bound is proposed to minimize the number of needed islands to successfully schedule tasks. To evaluate the performance of the proposed algorithm, 82 benchmarks from the MRTC, MediaBench, UTDSP, NetBench, and DSPstone benchmark suites were profiled by a worst-case-execution-time analyzer aiT and included in the experiments.
| Original language | English |
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| Title of host publication | 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC) |
| Publisher | IEEE |
| Pages | 467-472 |
| ISBN (Electronic) | 9781467330305 |
| ISBN (Print) | 9781467330299 |
| DOIs | |
| Publication status | Published - Jan 2013 |
| Externally published | Yes |
| Event | 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013) - Pacifico Yokohama, Yokohama, Japan Duration: 22 Jan 2013 → 25 Jan 2013 http://www.aspdac.com/aspdac2013/ |
Publication series
| Name | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC |
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| ISSN (Print) | 2153-6961 |
| ISSN (Electronic) | 2153-6961 |
Conference
| Conference | 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013) |
|---|---|
| Abbreviated title | ASP-DAC 2013 |
| Country/Territory | Japan |
| City | Yokohama |
| Period | 22/01/13 → 25/01/13 |
| Internet address |