An instruction folding solution for a Java processor
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review
Author(s)
Related Research Unit(s)
Detail(s)
Original language | English |
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Pages (from-to) | 133-143 |
Journal / Publication | Computer Systems Science and Engineering |
Volume | 24 |
Issue number | 3 |
Publication status | Published - May 2009 |
Link(s)
Abstract
Java is widely applied into embedded devices and network applications. Java programs are compiled into Java bytecodes, which are executed in the Java virtual machine. The Java virtual machine is a stack machine and instruction folding is a technique to reduce the redundant stack operations. In this paper, a simple instruction folding algorithm is proposed for a Java processor named jHISC, where bytecodes are classified into five categories and the operation results of incomplete folding groups are held for further folding. In the benchmark JVM98, with respect to all stack operations, the percentage of the eliminated P and C type instructions varies from 87% to 98% and the average is about 93%. The reduced instructions are between 37% and 50% of all operations and the average is 44%. © 2009 CRL Publishing Ltd.
Research Area(s)
- Bytecode, Instruction folding, Java processor, Java virtual machine
Citation Format(s)
An instruction folding solution for a Java processor. / Tan, Yiyu; Yau, Chihang; Fong, Anthony S. et al.
In: Computer Systems Science and Engineering, Vol. 24, No. 3, 05.2009, p. 133-143.
In: Computer Systems Science and Engineering, Vol. 24, No. 3, 05.2009, p. 133-143.
Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review