Power oscillator design : class-E

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)22_Publication in policy or professional journal

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Author(s)

Detail(s)

Original languageEnglish
Pages (from-to)153-156
Journal / PublicationProceedings - IEEE International Symposium on Circuits and Systems
Volume6
Publication statusPublished - 1994

Conference

Title1994 IEEE International Symposium on Circuits and Systems (ISCAS 1994)
PlaceUnited Kingdom
CityLondon
Period30 May - 2 June 1994

Abstract

An analytic approach to the design of high efficiency tuned power oscillator is presented. By employing large-signal S-parameters, theoretical conditions for optimum operation of the oscillator have been formulated and discussed. Loss due to non-zero switching time, saturation resistance etc of the transistor employed will be accounted for. Various oscillators at 900MHz were designed using the derived theory. Experimental results showed that the measured data are in good agreement with the predicted data.

Citation Format(s)

Power oscillator design : class-E. / Tsang, K. F.; Morgan, G. B.; Yip, P. C L et al.

In: Proceedings - IEEE International Symposium on Circuits and Systems, Vol. 6, 1994, p. 153-156.

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)22_Publication in policy or professional journal