Hardware implementation of genetic algorithms using FPGA
Research output: Journal Publications and Reviews › RGC 22 - Publication in policy or professional journal
Author(s)
Related Research Unit(s)
Detail(s)
Original language | English |
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Journal / Publication | Midwest Symposium on Circuits and Systems |
Volume | 1 |
Publication status | Published - 2004 |
Conference
Title | The 2004 47th Midwest Symposium on Circuits and Systems - Conference Proceedings |
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Place | Japan |
City | Hiroshima |
Period | 25 - 28 July 2004 |
Link(s)
Abstract
In this paper, a hardware implementation of genetic algorithm using field-programmable gate arrays (FPGAs) is described and implemented. Such development can greatly improve the speed of genetic algorithm by the hardware parallel and pipelined architectures. In our design, various configurations of parallelization are available with a PCI board based design, which further helps in forming a fast optimization tool for real-world applications.
Citation Format(s)
Hardware implementation of genetic algorithms using FPGA. / Tang, Wallace; Yip, Leslie.
In: Midwest Symposium on Circuits and Systems, Vol. 1, 2004.
In: Midwest Symposium on Circuits and Systems, Vol. 1, 2004.
Research output: Journal Publications and Reviews › RGC 22 - Publication in policy or professional journal