Robust and area-efficient nLDMOS-SCR with waffle layout structure for high-voltage ESD protection

J. Zheng; Y. Han; H. Wong; B. Song; S. Dong; F. Ma; L. Zhong

doi:10.1049/el.2012.3548

Author(s)

J. Zheng
Y. Han
B. Song
S. Dong
F. Ma
L. Zhong

Detail(s)

Original language	English
Pages (from-to)	1629-1630
Journal / Publication	Electronics Letters
Volume	48
Issue number	25
Publication status	Published - 6 Dec 2012
Externally published	Yes

Link(s)

DOI	DOI https://doi.org/10.1049/el.2012.3548 Final Published version
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Link to Scopus	https://www.scopus.com/record/display.uri?eid=2-s2.0-84878410508&origin=recordpage
Permanent Link	https://scholars.cityu.edu.hk/en/publications/publication(5d5a7a34-9494-4343-aa7b-a654969c123a).html

Abstract

A novel waffle-type nLDMOS-SCR ESD clamp with compact source and drain for high-voltage ESD protection is proposed and realised using the 0.35 m, 30/5 V bipolar-CMOS-DMOS (BCD) process. With this new structure, a high ESD failure current of 4.4 A was achieved with a total channel width of only 60 m. Considering the area efficiency, the waffle-type structure provides more than 30% higher current handling capability than the conventional ones. Because of its better robustness and area efficiency, the waffle-type structure should be a promising layout for high-voltage ESD protection applications. © 2012 The Institution of Engineering and Technology.

Citation Format(s)

[ RIS ] [ BibTeX ]

Robust and area-efficient nLDMOS-SCR with waffle layout structure for high-voltage ESD protection. / Zheng, J.; Han, Y.; Wong, H. et al.

In: Electronics Letters, Vol. 48, No. 25, 06.12.2012, p. 1629-1630.

Research output: Journal Publications and Reviews (RGC: 21, 22, 62) › 21_Publication in refereed journal › peer-review

Zheng, J, Han, Y, Wong, H, Song, B, Dong, S, Ma, F & Zhong, L 2012, 'Robust and area-efficient nLDMOS-SCR with waffle layout structure for high-voltage ESD protection', Electronics Letters, vol. 48, no. 25, pp. 1629-1630. https://doi.org/10.1049/el.2012.3548

Zheng, J., Han, Y., Wong, H., Song, B., Dong, S., Ma, F., & Zhong, L. (2012). Robust and area-efficient nLDMOS-SCR with waffle layout structure for high-voltage ESD protection. Electronics Letters, 48(25), 1629-1630. https://doi.org/10.1049/el.2012.3548

Zheng J, Han Y, Wong H, Song B, Dong S, Ma F et al. Robust and area-efficient nLDMOS-SCR with waffle layout structure for high-voltage ESD protection. Electronics Letters. 2012 Dec 6;48(25):1629-1630. doi: 10.1049/el.2012.3548

Zheng, J. ; Han, Y. ; Wong, H. et al. / Robust and area-efficient nLDMOS-SCR with waffle layout structure for high-voltage ESD protection. In: Electronics Letters. 2012 ; Vol. 48, No. 25. pp. 1629-1630.