Use of a Series Voltage Compensator for Reduction of the DC-Link Capacitance in a Capacitor-Supported System

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Original languageEnglish
Article number6514487
Pages (from-to)1163-1175
Number of pages13
Journal / PublicationIEEE Transactions on Power Electronics
Issue number3
Online published7 May 2013
Publication statusPublished - Mar 2014


A technique for reduction of the dc-link capacitance in a capacitor-supported system is presented. The concept is based on connecting a voltage source in series with the dc bus line to compensate the ripple voltage on the dc-link capacitor, so as to make the output have a near zero ripple voltage. Since the voltage compensator processes small ripple voltage on the dc link and reactive power only, it can be implemented with low-voltage devices. The overall required energy storage of the dc-link, formed by a reduced value of dc-link capacitor and the voltage compensator, is reduced, allowing the replacement of popularly used electrolytic capacitors with alternatives of longer lifetime, like power film capacitors, or extending the system lifetime even if there is a significant reduction in the capacitance of electrolytic capacitors due to the aging effect. Comprehensive analysis on the static and dynamic characteristics of the system, and hold-up time requirement will be discussed. The proposed technique is exemplified on an ac-dc-dc power conversion system. Theoretical predictions are favorably verified by experimental results.

Research Area(s)

  • Capacitance reduction, dc-link capacitor, power conversion system, voltage compensator