TY - GEN
T1 - PERFORMANCE ANALYSIS OF MULTIPLE ACCESS CHAOTIC-SEQUENCE SPREAD-SPECTRUM COMMUNICATION SYSTEMS EMPLOYING PARALLEL INTERFERENCE CANCELLATION DETECTORS
AU - Tam, Wai M.
AU - Lau, Francis C.M.
AU - Tse, Chi K.
PY - 2003/5
Y1 - 2003/5
N2 - In this paper, parallel interference cancellation (PIC) detectors are applied to jointly decode symbols in a multiple access chaotic-sequence spread-spectrum communication system. In particular, three types of linear detectors, namely, single-user detector, decorrelating detector and minimum mean-square-error detector, are used to estimate the transmitted symbols for the first stage of the PIC detector. The technique for deriving the approximate bit error rate (BER) is described and computer simulations are performed to verify the analytical BERs.
AB - In this paper, parallel interference cancellation (PIC) detectors are applied to jointly decode symbols in a multiple access chaotic-sequence spread-spectrum communication system. In particular, three types of linear detectors, namely, single-user detector, decorrelating detector and minimum mean-square-error detector, are used to estimate the transmitted symbols for the first stage of the PIC detector. The technique for deriving the approximate bit error rate (BER) is described and computer simulations are performed to verify the analytical BERs.
KW - Chaos-based communications
KW - Multi-user detection
KW - Multiple access
KW - Parallel interference cancellation
KW - Spread-spectrum communications
UR - http://www.scopus.com/inward/record.url?scp=0038421231&partnerID=8YFLogxK
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-0038421231&origin=recordpage
U2 - 10.1109/iscas.2003.1204992
DO - 10.1109/iscas.2003.1204992
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 0780377613
VL - 3
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 208
EP - 211
BT - Proceedings - IEEE International Symposium on Circuits and Systems
T2 - Proceedings of the 2003 IEEE International Symposium on Circuits and Systems
Y2 - 25 May 2003 through 28 May 2003
ER -