TY - GEN
T1 - Pattern-aware write-back strategy to minimize energy consumption of PCM-based storage systems
AU - Chang, Hung-Sheng
AU - Chang, Yuan-Hao
AU - Kuan, Yuan-Hung
AU - Huang, Xiang-Zhi
AU - Kuo, Tei-Wei
AU - Li, Hsiang-Pang
PY - 2016/8
Y1 - 2016/8
N2 - Phase-change memory (PCM) is a potential candidate to replace flash memory in the storage design of mobile computing systems, but its energy consumption becomes a challenging issue when the multi-level cell (MLC) technology is adopted to reduce its unit cost. In contrast to the existing works that focus on reducing energy consumption at the hardware/device level, we propose an energy-aware memory management design with a pattern-aware write-back strategy in the software/OS level. It selects and writes proper data from main memory to PCM device with minimized energy consumption with considering the data bit pattern, data access locality, and characteristics of PCM. The experiments were conducted based on the workloads collected from representative benchmarks to evaluate the capability of the proposed design, and the results are very encouraging.
AB - Phase-change memory (PCM) is a potential candidate to replace flash memory in the storage design of mobile computing systems, but its energy consumption becomes a challenging issue when the multi-level cell (MLC) technology is adopted to reduce its unit cost. In contrast to the existing works that focus on reducing energy consumption at the hardware/device level, we propose an energy-aware memory management design with a pattern-aware write-back strategy in the software/OS level. It selects and writes proper data from main memory to PCM device with minimized energy consumption with considering the data bit pattern, data access locality, and characteristics of PCM. The experiments were conducted based on the workloads collected from representative benchmarks to evaluate the capability of the proposed design, and the results are very encouraging.
UR - http://www.scopus.com/inward/record.url?scp=84986601859&partnerID=8YFLogxK
UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-84986601859&origin=recordpage
U2 - 10.1109/NVMSA.2016.7547175
DO - 10.1109/NVMSA.2016.7547175
M3 - RGC 32 - Refereed conference paper (with host publication)
T3 - Non-Volatile Memory Systems and Applications Symposium, NVMSA
BT - 2016 5th Non-Volatile Memory Systems and Applications Symposium (NVMSA)
PB - IEEE
T2 - 5th Non-Volatile Memory Systems and Applications Symposium, NVMSA 2016
Y2 - 17 August 2016 through 19 August 2016
ER -