Abstract
The effects of parasitic capacitances on the performances of three common switched-capacitor DC–DC converters operating in the complete charge transfer case were studied with matrix calculation. The study was conducted by describing the top- and bottom-plate parasitic capacitances of a capacitor network in matrix form; these resulted matrices were then employed in some existing solutions so that not only the steady-state performance, but also the dynamic-state performance of a two-phase switched-capacitor DC–DC converter could be evaluated. The proposed method was validated with SPICE simulation and was used to study the final output voltage, start-up time and start-up energy consumption of an exponential, a Fibonacci and a linear converter under different parasitic capacitance effects. © 2021 The Authors. IET Power Electronics published by John Wiley & Sons, Ltd. on behalf of The Institution of Engineering and Technology
| Original language | English |
|---|---|
| Pages (from-to) | 1195-1208 |
| Journal | IET Power Electronics |
| Volume | 8 |
| Issue number | 7 |
| Online published | 1 Jul 2015 |
| DOIs | |
| Publication status | Published - Jul 2015 |
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