TY - GEN
T1 - Ordering chaos of Chua's circuit
AU - Chen, Guanrong
AU - Dong, Xiaoning
PY - 1993
Y1 - 1993
N2 - Ordering or controlling chaos has in recent years attracted special attention from a number of research groups in the areas of nonlinear dynamics and control. The present authors have developed a unified linear feedback control methodology for this purpose, which works well for many general chaotic systems. It has been shown that under certain conditions a chaotic trajectory can be guided to one of the unstable limit cycles of the dynamic system, provided that an appropriate feedback control is applied. This control technique is refined and applied to the well-known Chua's circuit in this paper, giving simpler implementation with even better results. A simple sufficient condition for the design of such a linear feedback controller is given, and the numerical simulation as well as the physical implementation of the designed feedback control configuration are both illustrated.
AB - Ordering or controlling chaos has in recent years attracted special attention from a number of research groups in the areas of nonlinear dynamics and control. The present authors have developed a unified linear feedback control methodology for this purpose, which works well for many general chaotic systems. It has been shown that under certain conditions a chaotic trajectory can be guided to one of the unstable limit cycles of the dynamic system, provided that an appropriate feedback control is applied. This control technique is refined and applied to the well-known Chua's circuit in this paper, giving simpler implementation with even better results. A simple sufficient condition for the design of such a linear feedback controller is given, and the numerical simulation as well as the physical implementation of the designed feedback control configuration are both illustrated.
UR - https://www.scopus.com/pages/publications/0027242784
UR - https://www.scopus.com/pages/publications/0027242784#tab=impact
M3 - RGC 32 - Refereed conference paper (with host publication)
SN - 780312813
VL - 4
SP - 2604
EP - 2607
BT - Proceedings - IEEE International Symposium on Circuits and Systems
PB - IEEE
T2 - Proceedings of the 1993 IEEE International Symposium on Circuits and Systems
Y2 - 3 May 1993 through 6 May 1993
ER -