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Optimizing memory cost with loop transformations

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

Abstract

Embedded systems are usually constrained in terms of timing, power, and memory. Many embedded applications, especially in the multi-media and telecom domains, are inherently data dominant. These embedded DSP applications usually exhibit intensive computations in the form of multilevel loops. The performance of these embeddedDSP applications mainly depends on the code quality of the loops and the memory hierarchy design. During the design phase of the embedded system, it is important to estimate the overall memory cost to guide the memory system design and take advantage of the memory system by program transformations and loop transformations. Loop transformations including loop permutation and fusion are important systemlevel design techniques used to enhance the data locality and thus reduce the lifetime of data elements and memory cost. In this paper, we propose a technique to estimate the memory cost of a nested loop. We then propose loop-optimization strategies to combine various loop transformations to reduce the overall memory cost. The simulation results showed that the execution time of the transformed loops by our proposed loop-optimization strategies is significantly reduced compared to the execution time of the original loops, and the transformed loops reduce the memory cost. Copyright © 2011 by the International Society for Computers and Their Applications (ISCA).
Original languageEnglish
Title of host publicationProceedings of the ISCA 26th International Conference on Computers and Their Applications, CATA 2011
Pages27-33
Publication statusPublished - 2011
Event26th International Conference on Computers and Their Applications, CATA 2011 - New Orleans, LA, United States
Duration: 23 Mar 201125 Mar 2011

Conference

Conference26th International Conference on Computers and Their Applications, CATA 2011
PlaceUnited States
CityNew Orleans, LA
Period23/03/1125/03/11

Research Keywords

  • Embedded DSP
  • Loop fusion
  • Loop permutation
  • Memory cost
  • Scheduling

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