Optimized Power Delivery for 3D IC Technology Using Grind Side Redistribution Layers

Menglu Li, Prakash Periasamy, K. N. Tu, Subramanian S. Iyer

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

5 Citations (Scopus)

Abstract

This paper addresses the issue of delivering power to high performance 3D stacks such as a processor on cache stack. Through Silicon Vias (TSVs) with their associated keep out zones (KOZ) occupy only a small fraction of the die (
Original languageEnglish
Title of host publicationProceedings - ECTC 2016: 66th Electronic Components and Technology Conference
PublisherIEEE
Pages2449-2454
Volume2016-August
ISBN (Print)9781509012039
DOIs
Publication statusPublished - 16 Aug 2016
Externally publishedYes
Event66th IEEE Electronic Components and Technology Conference (ECTC 2016) - Las Vegas, United States
Duration: 31 May 20163 Jun 2016

Publication series

NameProceedings - Electronic Components and Technology Conference
Volume2016-August
ISSN (Print)0569-5503

Conference

Conference66th IEEE Electronic Components and Technology Conference (ECTC 2016)
Country/TerritoryUnited States
CityLas Vegas
Period31/05/163/06/16

Bibliographical note

Publication details (e.g. title, author(s), publication statuses and dates) are captured on an “AS IS” and “AS AVAILABLE” basis at the time of record harvesting from the data source. Suggestions for further amendments or supplementary information can be sent to [email protected].

Research Keywords

  • 3D IC
  • Electromigration
  • IR drop
  • Power delivery
  • RDL
  • TSV

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