TY - JOUR
T1 - Optimal burn-in decision making
AU - Kim, Taeho
AU - Kuo, Way
PY - 1998/11
Y1 - 1998/11
N2 - This paper presents a conceptual model of burn-in decision making which gives an optimal burn-in time for semiconductor devices and describes how burn-in affects total yield and reliability. For the gate oxide of integrated circuits we consider four burn-in policies: no burn-in, wafer-level bum-in only, package-level burn-in only and wafer-level burn-in prior to package-level burn-in. A decision-making model to minimize cost is given for each burn-in policy. Burn-in time is strongly limited by the cost factor and reliability requirements. In order to reduce the cost incurred in burn-in, a short test time and small test samples are recommended. © 1998 John Wiley & Sons, Ltd.
AB - This paper presents a conceptual model of burn-in decision making which gives an optimal burn-in time for semiconductor devices and describes how burn-in affects total yield and reliability. For the gate oxide of integrated circuits we consider four burn-in policies: no burn-in, wafer-level bum-in only, package-level burn-in only and wafer-level burn-in prior to package-level burn-in. A decision-making model to minimize cost is given for each burn-in policy. Burn-in time is strongly limited by the cost factor and reliability requirements. In order to reduce the cost incurred in burn-in, a short test time and small test samples are recommended. © 1998 John Wiley & Sons, Ltd.
KW - Burn-in
KW - Package-level burn-in
KW - Semiconductor devices
KW - Wafer-level burn-in
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U2 - 10.1002/(SICI)1099-1638(199811/12)14:6<417::AID-QRE220>3.0.CO;2-W
DO - 10.1002/(SICI)1099-1638(199811/12)14:6<417::AID-QRE220>3.0.CO;2-W
M3 - RGC 21 - Publication in refereed journal
SN - 0748-8017
VL - 14
SP - 417
EP - 423
JO - Quality and Reliability Engineering International
JF - Quality and Reliability Engineering International
IS - 6
ER -