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On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse

Research output: Journal Publications and ReviewsRGC 21 - Publication in refereed journalpeer-review

Abstract

This brief describes the neuromorphic very large scale integration implementation of a synapse utilizing a single floating-gate (FG) transistor that can be used to store a weight in a nonvolatile manner and demonstrate biological learning rules such as spike-timing-dependent plasticity (STDP). The experimental STDP plot (change in weight against Δt = tpost - tpre) of a traditional FG synapse from previous studies shows a depression instead of potentiation at some range of positive values of Δt - we call this non-STDP behavior. In this brief, we first analyze theoretically the reason for this anomaly and then present a simple solution based on changing control gate waveforms of the FG device to make the weight change conform closely to biological observations over a wide range of parameters. The experimental results from an FG synapse fabricated in AMS 0.35-μm CMOS process design are also presented to justify the claim. Finally, we present the simulation results of a circuit designed to create the modified gate voltage waveform.
Original languageEnglish
Article number7031963
Pages (from-to)2596-2601
JournalIEEE Transactions on Neural Networks and Learning Systems
Volume26
Issue number10
DOIs
Publication statusPublished - 1 Oct 2015
Externally publishedYes

Bibliographical note

Publication details (e.g. title, author(s), publication statuses and dates) are captured on an “AS IS” and “AS AVAILABLE” basis at the time of record harvesting from the data source. Suggestions for further amendments or supplementary information can be sent to [email protected].

Research Keywords

  • Floating gate (FG)
  • learning
  • neuromorphic
  • neuroscience
  • spike-timing-dependent plasticity (STDP)
  • synapse
  • very large scale integration (VLSI)

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