NOVEL SILICIDED SHALLOW JUNCTION TECHNOLOGY FOR CMOS VLSI.

D. L. Kwong, Y. H. Ku, S. K. Lee, N. S. Alvi, P. Chu, P. Zhou, J. M. White

Research output: Chapters, Conference Papers, Creative and Literary WorksRGC 32 - Refereed conference paper (with host publication)peer-review

Abstract

A novel technique for the fabrication of shallow, silicided p plus -n junctions with excellent electrical characteristics has been developed. The technique utilizes the ion implantation of dopants into silicide layers formed by ion-beam mixing with Si ions and low temperature annealing, and the subsequent drive-in of implanted dopants into the Si substrates to form shallow junctions. This technique can be easily applied to the fabrication of MOSFETs in a self-aligned fashion, and can have a significant impact on CMOS VLSI technology.
Original languageEnglish
Title of host publicationMaterials Research Society Symposia Proceedings
PublisherMaterials Research Soc
Pages379-385
Volume71
ISBN (Print)931837375
Publication statusPublished - 1986
Externally publishedYes

Publication series

Name
Volume71
ISSN (Electronic)0272-9172

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