Abstract
The spurious triggering pulse is an intrinsic feature in the gate-source voltage of the synchronous switch of the bridge-leg configuration. If it exceeds the threshold voltage of the switch, the spurious turn-on will occur and consequently incur excessive switching losses, self-oscillation and even shoot-through. This paper intends to establish a circuit-level analytical model of the synchronous buck converter considering all important parasitic elements and the reverse recovery characteristics of the body diode of the synchronous MOSFET to explore the underlying mechanism of the spurious triggering pulse. It is discovered that apart from the generally acknowledged Cdv/dt induced increase in the gate voltage, the Ldi/dt induced decease in the source voltage contributes to the pulse as well. Besides, the impact of the gate impedance of the synchronous MOSFET on this pulse depends on the dominance of these two factors. The analytical results will be verified by the experimental results of the prototype of a 40V/6A synchronous buck converter. © 2013 IEEE.
| Original language | English |
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| Title of host publication | 2013 5th International Conference on Power Electronics Systems and Applications, PESA 2013 |
| Publisher | IEEE Computer Society |
| ISBN (Print) | 9781479932764 |
| DOIs | |
| Publication status | Published - 2013 |
| Event | 2013 5th International Conference on Power Electronics Systems and Applications, PESA 2013 - Hong Kong, Hong Kong, China Duration: 11 Dec 2013 → 13 Dec 2013 |
Conference
| Conference | 2013 5th International Conference on Power Electronics Systems and Applications, PESA 2013 |
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| Place | Hong Kong, China |
| City | Hong Kong |
| Period | 11/12/13 → 13/12/13 |
Research Keywords
- bridge-leg configuration
- Cdv/dt induced turn-on
- MOSFET
- spurious turn-on