Neural Network Diagnosis of IC Faults

A. Wu; T. Lin; C. Tseng; J. Meador

doi:10.1109/VTEST.1991.208158

Neural Network Diagnosis of IC Faults

A. Wu
, T. Lin
, C. Tseng
, J. Meador

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

5 Citations (Scopus)

Abstract

This paper presents experimental results which show that feedforward neural networks are well suited for analog IC fault diagnosis. Their results suggest that feedforward networks provide a cost efficient method for IC fault diagnosis in a large scale production environment. They specifically compare the diagnostic accuracy and the computational requirements of a simple feedforward network against that of Gaussian maximum likelihood and K-nearest neighbors classifiers. The feedforward network is found to provide an order-of-magnitude improvement in diagnostic speed while consistently performing as well as or better than any of the other classifiers in terms of accuracy. This makes the feedforward network classifier an excellent candidate for production line diagnosis of IC faults, where circuit verification time greatly influences total cost per part.

Original language	English
Title of host publication	Digest of Papers 1991 IEEE VLSI Test Symposium
Subtitle of host publication	Chip-to-System Test Concerns for the 90's, VTEST 1991
Publisher	IEEE
Pages	199-203
DOIs	https://doi.org/10.1109/VTEST.1991.208158
Publication status	Published - Apr 1991
Externally published	Yes
Event	1991 IEEE VLSI Test Symposium: Chip-to-System Test Concerns for the 90's, VTEST 1991 - Atlantic City, United States Duration: 15 Apr 1991 → 17 Apr 1991

Publication series

Name	Proceedings of the IEEE VLSI Test Symposium

Conference

Conference	1991 IEEE VLSI Test Symposium: Chip-to-System Test Concerns for the 90's, VTEST 1991
Place	United States
City	Atlantic City
Period	15/04/91 → 17/04/91

Access Output

10.1109/VTEST.1991.208158

Other Access Options

Check CityUHK Library

Permanent Link

Right click to copy link

Cite this

@inproceedings{4e0a57204c6a4607b9f215959e3a3b75,

title = "Neural Network Diagnosis of IC Faults",

abstract = "This paper presents experimental results which show that feedforward neural networks are well suited for analog IC fault diagnosis. Their results suggest that feedforward networks provide a cost efficient method for IC fault diagnosis in a large scale production environment. They specifically compare the diagnostic accuracy and the computational requirements of a simple feedforward network against that of Gaussian maximum likelihood and K-nearest neighbors classifiers. The feedforward network is found to provide an order-of-magnitude improvement in diagnostic speed while consistently performing as well as or better than any of the other classifiers in terms of accuracy. This makes the feedforward network classifier an excellent candidate for production line diagnosis of IC faults, where circuit verification time greatly influences total cost per part.",

author = "A. Wu and T. Lin and C. Tseng and J. Meador",

year = "1991",

month = apr,

doi = "10.1109/VTEST.1991.208158",

language = "English",

series = "Proceedings of the IEEE VLSI Test Symposium",

publisher = "IEEE",

pages = "199--203",

booktitle = "Digest of Papers 1991 IEEE VLSI Test Symposium",

address = "United States",

note = "1991 IEEE VLSI Test Symposium: Chip-to-System Test Concerns for the 90's, VTEST 1991 ; Conference date: 15-04-1991 Through 17-04-1991",

}

Wu, A, Lin, T, Tseng, C & Meador, J 1991, Neural Network Diagnosis of IC Faults. in Digest of Papers 1991 IEEE VLSI Test Symposium: Chip-to-System Test Concerns for the 90's, VTEST 1991., 10.3, Proceedings of the IEEE VLSI Test Symposium, IEEE, pp. 199-203, 1991 IEEE VLSI Test Symposium: Chip-to-System Test Concerns for the 90's, VTEST 1991, Atlantic City, New Jersey, United States, 15/04/91. https://doi.org/10.1109/VTEST.1991.208158

Neural Network Diagnosis of IC Faults. / Wu, A.; Lin, T.; Tseng, C. et al.
Digest of Papers 1991 IEEE VLSI Test Symposium: Chip-to-System Test Concerns for the 90's, VTEST 1991. IEEE, 1991. p. 199-203 10.3 (Proceedings of the IEEE VLSI Test Symposium).

Research output: Chapters, Conference Papers, Creative and Literary Works › RGC 32 - Refereed conference paper (with host publication) › peer-review

TY - GEN

T1 - Neural Network Diagnosis of IC Faults

AU - Wu, A.

AU - Lin, T.

AU - Tseng, C.

AU - Meador, J.

PY - 1991/4

Y1 - 1991/4

N2 - This paper presents experimental results which show that feedforward neural networks are well suited for analog IC fault diagnosis. Their results suggest that feedforward networks provide a cost efficient method for IC fault diagnosis in a large scale production environment. They specifically compare the diagnostic accuracy and the computational requirements of a simple feedforward network against that of Gaussian maximum likelihood and K-nearest neighbors classifiers. The feedforward network is found to provide an order-of-magnitude improvement in diagnostic speed while consistently performing as well as or better than any of the other classifiers in terms of accuracy. This makes the feedforward network classifier an excellent candidate for production line diagnosis of IC faults, where circuit verification time greatly influences total cost per part.

AB - This paper presents experimental results which show that feedforward neural networks are well suited for analog IC fault diagnosis. Their results suggest that feedforward networks provide a cost efficient method for IC fault diagnosis in a large scale production environment. They specifically compare the diagnostic accuracy and the computational requirements of a simple feedforward network against that of Gaussian maximum likelihood and K-nearest neighbors classifiers. The feedforward network is found to provide an order-of-magnitude improvement in diagnostic speed while consistently performing as well as or better than any of the other classifiers in terms of accuracy. This makes the feedforward network classifier an excellent candidate for production line diagnosis of IC faults, where circuit verification time greatly influences total cost per part.

UR - https://www.scopus.com/pages/publications/85066896113

UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-85066896113&origin=recordpage

U2 - 10.1109/VTEST.1991.208158

DO - 10.1109/VTEST.1991.208158

M3 - RGC 32 - Refereed conference paper (with host publication)

T3 - Proceedings of the IEEE VLSI Test Symposium

SP - 199

EP - 203

BT - Digest of Papers 1991 IEEE VLSI Test Symposium

PB - IEEE

T2 - 1991 IEEE VLSI Test Symposium: Chip-to-System Test Concerns for the 90's, VTEST 1991

Y2 - 15 April 1991 through 17 April 1991

ER -

Neural Network Diagnosis of IC Faults

Abstract

Publication series

Conference

Access Output

Other Access Options

Permanent Link

Other Files and Links

Fingerprint

Cite this