Monolithic 3D CMOS Using Layered Semiconductors

Angada B. Sachid; Mahmut Tosun; Sujay B. Desai; Ching-Yi Hsu; Der-Hsien Lien; Surabhi R. Madhvapathy; Yu-Ze Chen; Mark Hettick; Jeong Seuk Kang; Yuping Zeng; Jr-Hau He; Edward Yi Chang; Yu-Lun Chueh; Ali Javey; Chenming Hu

doi:10.1002/adma.201505113

Monolithic 3D CMOS Using Layered Semiconductors

Angada B. Sachid
, Mahmut Tosun
, Sujay B. Desai
, Ching-Yi Hsu
, Der-Hsien Lien
, Surabhi R. Madhvapathy
, Yu-Ze Chen
, Mark Hettick
, Jeong Seuk Kang
, Yuping Zeng
, Jr-Hau He
, Edward Yi Chang
, Yu-Lun Chueh
, Ali Javey^*
, Chenming Hu^*

^*Corresponding author for this work

Research output: Journal Publications and Reviews › RGC 21 - Publication in refereed journal › peer-review

158 Citations (Scopus)

Abstract

Monolithic 3D integrated circuits using transition metal dichalcogenide materials and low‐temperature processing are reported. A variety of digital and analog circuits are implemented on two sequentially integrated layers of devices. Inverter circuit operation at an ultralow supply voltage of 150 mV is achieved, paving the way to high‐density, ultralow‐voltage, and ultralow‐power applications. [Figure not available: see fulltext.]

Original language	English
Pages (from-to)	2547-2554
Journal	Advanced Materials
Volume	28
Issue number	13
Online published	2 Feb 2016
DOIs	https://doi.org/10.1002/adma.201505113
Publication status	Published - 6 Apr 2016
Externally published	Yes

Research Keywords

metal oxide semiconductors
monolithic 3D integration
transition metal dichalcogenides
ultra-low voltage operation

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10.1002/adma.201505113

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title = "Monolithic 3D CMOS Using Layered Semiconductors",

abstract = "Monolithic 3D integrated circuits using transition metal dichalcogenide materials and low‐temperature processing are reported. A variety of digital and analog circuits are implemented on two sequentially integrated layers of devices. Inverter circuit operation at an ultralow supply voltage of 150 mV is achieved, paving the way to high‐density, ultralow‐voltage, and ultralow‐power applications. [Figure not available: see fulltext.]",

keywords = "metal oxide semiconductors, monolithic 3D integration, transition metal dichalcogenides, ultra-low voltage operation",

author = "Sachid, \{Angada B.\} and Mahmut Tosun and Desai, \{Sujay B.\} and Ching-Yi Hsu and Der-Hsien Lien and Madhvapathy, \{Surabhi R.\} and Yu-Ze Chen and Mark Hettick and Kang, \{Jeong Seuk\} and Yuping Zeng and Jr-Hau He and Chang, \{Edward Yi\} and Yu-Lun Chueh and Ali Javey and Chenming Hu",

year = "2016",

month = apr,

day = "6",

doi = "10.1002/adma.201505113",

language = "English",

volume = "28",

pages = "2547--2554",

journal = "Advanced Materials",

issn = "0935-9648",

publisher = "Wiley-Blackwell",

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}

TY - JOUR

T1 - Monolithic 3D CMOS Using Layered Semiconductors

AU - Sachid, Angada B.

AU - Tosun, Mahmut

AU - Desai, Sujay B.

AU - Hsu, Ching-Yi

AU - Lien, Der-Hsien

AU - Madhvapathy, Surabhi R.

AU - Chen, Yu-Ze

AU - Hettick, Mark

AU - Kang, Jeong Seuk

AU - Zeng, Yuping

AU - He, Jr-Hau

AU - Chang, Edward Yi

AU - Chueh, Yu-Lun

AU - Javey, Ali

AU - Hu, Chenming

PY - 2016/4/6

Y1 - 2016/4/6

N2 - Monolithic 3D integrated circuits using transition metal dichalcogenide materials and low‐temperature processing are reported. A variety of digital and analog circuits are implemented on two sequentially integrated layers of devices. Inverter circuit operation at an ultralow supply voltage of 150 mV is achieved, paving the way to high‐density, ultralow‐voltage, and ultralow‐power applications. [Figure not available: see fulltext.]

AB - Monolithic 3D integrated circuits using transition metal dichalcogenide materials and low‐temperature processing are reported. A variety of digital and analog circuits are implemented on two sequentially integrated layers of devices. Inverter circuit operation at an ultralow supply voltage of 150 mV is achieved, paving the way to high‐density, ultralow‐voltage, and ultralow‐power applications. [Figure not available: see fulltext.]

KW - metal oxide semiconductors

KW - monolithic 3D integration

KW - transition metal dichalcogenides

KW - ultra-low voltage operation

UR - https://www.scopus.com/pages/publications/84957541630

UR - https://www.scopus.com/record/pubmetrics.uri?eid=2-s2.0-84957541630&origin=recordpage

U2 - 10.1002/adma.201505113

DO - 10.1002/adma.201505113

M3 - RGC 21 - Publication in refereed journal

SN - 0935-9648

VL - 28

SP - 2547

EP - 2554

JO - Advanced Materials

JF - Advanced Materials

IS - 13

ER -

Monolithic 3D CMOS Using Layered Semiconductors

Abstract

Research Keywords

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