Modified booth pipelined multiplication

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review

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Detail(s)

Original languageEnglish
Pages (from-to)1179-1180
Journal / PublicationElectronics Letters
Volume34
Issue number12
Publication statusPublished - 11 Jun 1998

Abstract

A pipelined modified Booth multiplication is proposed for low power, high performance DSP application. The proposed multiplication is suitable for VLSI implementation. It has a better power-performance ratio than the traditional pipelined multiplier and modified Booth multiplier.

Citation Format(s)

Modified booth pipelined multiplication. / Wu, A.; Ng, C. K.; Tang, K. C.

In: Electronics Letters, Vol. 34, No. 12, 11.06.1998, p. 1179-1180.

Research output: Journal Publications and Reviews (RGC: 21, 22, 62)21_Publication in refereed journalpeer-review