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Modeling of a 200 KHz Bandwidth Low-pass Switch-capacitor Sigma-delta DAC with a Raised Spur-free Modulator

  • Yaya Chen
  • , Yan Han*
  • , Shifeng Zhang
  • , Tianlin Cao
  • , Xiaoxia Han
  • , Ray C. C. Cheung
  • *Corresponding author for this work

Research output: Journal Publications and ReviewsRGC 21 - Publication in refereed journalpeer-review

Abstract

This paper proposes a modulator that improves the signal-to-noise and distortion ratio (SNDR) by 6 dB compared with the conventional modulator. A high pass dither shaper added to the raised modulator eliminates harmonic spurs without increasing the in-band noise floor. Moreover, a behavior-level modeling method is proposed for a 200 KHz bandwidth switch-capacitor sigma-delta digital to analog converter (SC ΣΔDAC). Consequently, by considering the main non-idealities in the SC ΣΔDAC, in contrast with the conventional SC ΣΔDAC, MATLAB simulation results show that the SC ΣΔDAC with the proposed modulator boosts the SNDR by approximately 6 dB and the spurious free dynamic range (SFDR) by approximately 8 dB. Finally, with the circuit implemented in a 0.18 µm CMOS process, the measurement results are also used to further validate the proposed SC ΣΔDAC model.
Original languageEnglish
Pages (from-to)666-674
JournalJournal of Semiconductor Technology and Science
Volume17
Issue number5
DOIs
Publication statusPublished - Oct 2017

Research Keywords

  • Behavior-level modeling
  • Dither
  • Dynamic element match
  • Switch capacitor
  • ΣΔDAC

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