Mechanism of I-V asymmetry of MIM capacitors based on high-k dielectric

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)peer-review

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Author(s)

  • W. S. Lau
  • D. Q. Yu
  • X. Wang
  • H. Wong
  • Y. Xu

Detail(s)

Original languageEnglish
Title of host publicationChina Semiconductor Technology International Conference 2015, CSTIC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479972418
Publication statusPublished - 8 Jul 2015
Externally publishedYes

Conference

Title2015 China Semiconductor Technology International Conference, CSTIC 2015
PlaceChina
CityShanghai
Period15 - 16 March 2015

Abstract

MIM capacitors based on high-k dielectric are used in analog CMOS. They tend to show up an asymmetric I-V characteristics even though they may have an apparently symmetric structure; the same situation occurs for high-k dielectric deposited by CVD or ALD. In this paper, we will propose a physical mechanism for the asymmetric I-V characteristics observed and we will also provide experimental data to support our claim.

Research Area(s)

  • asymmetry, atomic force microscopy, atomic layer deposition, chemical vapor deposition, high-k dielectric, leakage current, MIM capacitor, transmission electron microscopy

Citation Format(s)

Mechanism of I-V asymmetry of MIM capacitors based on high-k dielectric. / Lau, W. S.; Yu, D. Q.; Wang, X.; Wong, H.; Xu, Y.

China Semiconductor Technology International Conference 2015, CSTIC 2015. Institute of Electrical and Electronics Engineers Inc., 2015. 7153403.

Research output: Chapters, Conference Papers, Creative and Literary Works (RGC: 12, 32, 41, 45)32_Refereed conference paper (with ISBN/ISSN)peer-review